Abstract: System, methods, and devices provide scaling for multi-window displays. Systems include decoders configured to decode a plurality of media streams, wherein each of the plurality of media streams includes a plurality of frames each comprising video data. Systems further include memory devices configured to store a plurality of unscaled frames included in the plurality of frames and received from the decoder, and processing devices configured to generate a plurality of display parameters based, at least in part, on the plurality of media streams. Systems also include a plurality of scalers configured to identify frames to be scaled based on the plurality of display parameters, further configured to scale the identified plurality of frames based on a plurality of scaling parameters. Systems further include encoders configured to encode at least some of the plurality of scaled frames into one or more media steams.

Abstract: System, methods, and devices provide scaling for multi-window displays. Systems include decoders configured to decode a plurality of media streams, wherein each of the plurality of media streams includes a plurality of frames each comprising video data. Systems further include memory devices configured to store a plurality of unscaled frames included in the plurality of frames and received from the decoder, and processing devices configured to generate a plurality of display parameters based, at least in part, on the plurality of media streams. Systems also include a plurality of scalers configured to identify frames to be scaled based on the plurality of display parameters, further configured to scale the identified plurality of frames based on a plurality of scaling parameters. Systems further include encoders configured to encode at least some of the plurality of scaled frames into one or more media steams.

Abstract: System, methods, and devices provide scaling for multi-window displays. Systems include decoders configured to decode a plurality of media streams, wherein each of the plurality of media streams includes a plurality of frames each comprising video data. Systems further include memory devices configured to store a plurality of unscaled frames included in the plurality of frames and received from the decoder, and processing devices configured to generate a plurality of display parameters based, at least in part, on the plurality of media streams. Systems also include a plurality of scalers configured to identify frames to be scaled based on the plurality of display parameters, further configured to scale the identified plurality of frames based on a plurality of scaling parameters. Systems further include encoders configured to encode at least some of the plurality of scaled frames into one or more media steams.

Abstract: Image data may be processed via one or more stages by a hardware image sensor pipeline (ISP) wherein one or more software processing steps may be inserted at any point within the hardware ISP. Output from any stage of the hardware ISP may be stored in memory. Stored hardware ISP output may be retrieved from memory and processed via one or more software processes. Results from the one or more software processes may be stored in memory and communicated to any stage of the hardware ISP for additional processing. In this regard, the hardware ISP and one or more processors may simultaneously process portions of image data. In addition, the hardware ISP and the one or more processors may be integrated within a chip.

Abstract: Image data may be processed via one or more stages by a hardware image sensor pipeline (ISP) wherein one or more software processing steps may be inserted at any point within the hardware ISP. Output from any stage of the hardware ISP may be stored in memory. Stored hardware ISP output may be retrieved from memory and processed via one or more software processes. Results from the one or more software processes may be stored in memory and communicated to any stage of the hardware ISP for additional processing. In this regard, the hardware ISP and one or more processors may simultaneously process portions of image data. In addition, the hardware ISP and the one or more processors may be integrated within a chip.

Abstract: Methods and systems for processing images using variable size tiles are disclosed and may include receiving raw image data for processing and dividing the received raw image data into a plurality of variable size tiles for processing. The variable size tiles may be sequentially processed. Each of the variable size tiles may comprise a plurality of lines. A size of the variable size tiles may be adjusted based on a distortion in a corresponding region of the raw image data. The variable size tiles may be processed in an image sensor pipeline. A current variable size tile may overlap at least one neighboring variable size tile. At least one neighboring variable size tile may include one or more of: above the current variable size tile, below the current variable size tile, left of the current variable size tile, and right of the current variable size tile.

Abstract: Image data may be processed via one or more stages by a hardware image sensor pipeline (ISP) wherein one or more software processing steps may be inserted at any point within the hardware ISP. Output from any stage of the hardware ISP may be stored in memory. Stored hardware ISP output may be retrieved from memory and processed via one or more software processes. Results from the one or more software processes may be stored in memory and communicated to any stage of the hardware ISP for additional processing. In this regard, the hardware ISP and one or more processors may simultaneously process portions of image data. In addition, the hardware ISP and the one or more processors may be integrated within a chip.

Abstract: Compounds of formula I in free or salt form, wherein Ar, X, Y, R1, R2, R3, R5, m, n, p and q have the meanings as indicated in the specification, are useful for treating conditions mediated by CCR3. Pharmaceutical compositions that contain the compounds and processes for preparing the compounds are also described.

Abstract: The apparatus is provided for inserting synchronizing data between blocks of serial data. A synchronizing data generating means produces a predetermined data sequence. Selector means are connected to said data generator and an input receives the serial data and is selected by said means or alternatively the means selects the synchronizing data. Control means are connected to an output of the selector means for producing an identification gap in the serial data before the start of the synchronizing data. The signal produced at an output of the control means comprises a data gap followed by the synchronizing data and the serial data.