Patents by Inventor Clyde H. Nagakura

Clyde H. Nagakura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7920210
    Abstract: An integrated circuit includes display processing components to process pixel data of digital video. The integrated circuit also includes mask-programmable logic integrated with one or more of the display processing components to receive the pixel data in a first color space and at least a second color space, where the mask-programmable logic can further process the pixel data to enhance the digital video.
    Type: Grant
    Filed: January 19, 2009
    Date of Patent: April 5, 2011
    Assignee: Denace Enterprise Co., L.L.C.
    Inventors: Clyde H. Nagakura, Po Weng Chiu, Qinggang Zhou
  • Patent number: 7830449
    Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: November 9, 2010
    Inventors: Qinggang Zhou, Clyde H. Nagakura, Sheng-Fu Wu, Andrew K. Chan
  • Publication number: 20090128699
    Abstract: An integrated circuit includes display processing components to process pixel data of digital video. The integrated circuit also includes mask-programmable logic integrated with one or more of the display processing components to receive the pixel data in a first color space and at least a second color space, where the mask-programmable logic can further process the pixel data to enhance the digital video.
    Type: Application
    Filed: January 19, 2009
    Publication date: May 21, 2009
    Applicant: Denace Enterprise Co., L.L.C.
    Inventors: Clyde H. Nagakura, Po Weng Chiu, Qinggang Zhou
  • Patent number: 7480010
    Abstract: An integrated circuit has a substantially non-customizable hardware portion and a mask-programmable logic portion. An image processing function common to many different makes and models of a type of electronic consumer device (for example, an image display device) is performed by the substantially non-customizable hardware portion. The substantially non-customizable hardware portion also outputs pixel data in both a first color space format and a second color space format. The mask-programmble logic portion can be mask-programmed for an individual manufacturer of electronic consumer devices such that the mask-programmable logic portion performs an additional special function specific to the electronic consumer devices of the individual manufacturer. Certain functions are better or more easily performed on pixel data in one color space format than another.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: January 20, 2009
    Assignee: Denace Enterprise Co., L.L.C.
    Inventors: Clyde H. Nagakura, Po Weng Chiu, Qinggang Zhou
  • Patent number: 7349030
    Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: March 25, 2008
    Inventors: Clyde H. Nagakura, Qinggang Zhou, Thomas M. Chan
  • Patent number: 7218355
    Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: May 15, 2007
    Inventors: Qinggang Zhou, Clyde H. Nagakura, Sheng-Fu Wu, Andrew K. Chan
  • Patent number: 7202908
    Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: April 10, 2007
    Inventors: Qinggang Zhou, Clyde H. Nagakura, Sheng-Fu Wu, Andrew K. Chan
  • Patent number: 7136108
    Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: November 14, 2006
    Inventors: Clyde H. Nagakura, Qinggang Zhou, Thomas M. Chan
  • Publication number: 20040160529
    Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
    Type: Application
    Filed: November 25, 2003
    Publication date: August 19, 2004
    Applicant: VIma Microsystems Corporation
    Inventors: Clyde H. Nagakura, Qinggang Zhou, Thomas M. Chan
  • Publication number: 20040160528
    Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
    Type: Application
    Filed: November 25, 2003
    Publication date: August 19, 2004
    Applicant: VIma Microsystems Corporation
    Inventors: Qinggang Zhou, Clyde H. Nagakura, Sheng-Fu Wu, Andrew K. Chan
  • Publication number: 20040160526
    Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
    Type: Application
    Filed: November 25, 2003
    Publication date: August 19, 2004
    Applicant: VIma Microsystems Corporation
    Inventors: Qinggang Zhou, Clyde H. Nagakura, Sheng-Fu Wu, Andrew K. Chan