Clyde Washburn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
Abstract: A deice maximizes the allowable granularity of adjustment of a bus driver line characteristics by compensating for temperature variations by selecting components that have an opposite and approximately equal thermal coefficient. In the first aspect, component parts may be made smaller because their tolerances need not be made so precise. In the second aspect, duplicating the circuitry with matching characteristics allows one circuit to be operational while the other circuit is tested or dormant. Switching between the two circuits is performed seamlessly with no interruption of device operation.
Abstract: A method and apparatus for controlling amplifier operating angle provides a corresponding increase in amplifier efficiency through a continual adjustment of operating angle from Class A, through Class AB, to Class B, an improved bandwidth in the output stage by preventing the output stage from reaching cutoff and the ability to adjust the high frequency content of the drive waveform to match that of the output stage thereby attaining the highest efficiency consistent with required distortion levels. A push-pull amplifier is coupled to a differential pushpull current drive source with out of phase drive signals and a preprocessing circuit with a first set of current sources which mirror one drive signal and a second set of current sources which mirror the other drive signal.
Abstract: A method and apparatus for mirroring currents in application specific integrated circuits provides higher current mirroring accuracy than previously obtainable with matched active devices by using small groups of resistors with local matching to create a summing node which represents the average voltage across the source resistors of the active output devices and by forming a reference resistor through the combination of resistors from the local resistor groups such that the reference resistor has properties which will largely cause cancellation of location gradients and initial value variation in the resistor groups. An error amplifier compares the voltage at the summing junction with the voltage across the reference resistor and adjusts its output voltage to drive the paralleled gates of each active mirror output device such that the summing junction and reference resistor voltages remain equal.
Abstract: An improved FM receiver is disclosed incorporating improved oscillating limiter circuitry having an electrically tunable bandpass filter which is phase modulated by the baseband signal the phase of which has been advanced in accordance with the formula: ##EQU1## wherein td.sub.1 equals the time delay through the limiter, td.sub.2 equals the time delay through the feedback filter, td.sub.3 equals the time delay through the demodulator and f.sub.n equals the frequency of the respective baseband components.
Abstract: An improved FM receiver is disclosed incorporating improved oscillating limiter circuitry having an electrically tunable bandpass filter and variable attenuator in regenerative feedback relationship around the limiter. The electrically tunable bandpass filter is responsive to DC components and high frequency noise components of the demodulated video baseband signal. The variable attenuator is responsive to the carrier-to-noise ratio of the received FM signal whereby the amount of regenerative feedback around the limiter will vary inversely proportional to charges in the carrier-to-noise ratio.
Abstract: A phase locked loop provides frequency modulation over an extended frequency range by summing a modulation signal with the loop signal at two separate points within the loop. The modulation signal is directly applied to the control input terminal of the voltage controlled oscillator. In addition, the modulation signal is processed to compensate for the transfer functions of loop components, and the processed signal is summed with the loop signal at an additional point between the output terminals of the phase detector and the lowpass filter of the loop. The processing of the modulation signal consists of preshaping of the signal to compensate for the transfer functions of loop circuitry located between the voltage controlled oscillator and the summing junction.
Abstract: A programmable frequency divider including a conventional dual modulus prescaler where neither modulus is a power of two. An adapter circuit is included for forcing the prescaler to follow a selected one of two preselected sequences of moduli. These sequences are selected so that a modified prescaler results having modified moduli, one of which is a power of two. The modified prescaler is used in a fully programmable frequency divider circuit. Since one of the modified moduli is a power of two, the frequency divider circuit may be programmed in full binary.
Abstract: A low noise, high frequency oscillator (50) is disclosed which includes a JFET (100) having a tuned circuit (102) connected in a feedback arrangement with it. The JFET is operated in a self-biasing mode and includes a gate biasing circuit (104) comprised of a capacitor (114) and a resistor (116). The capacitor (114) and resistor (116) are selected such that the gate bias circuit (104) represents a low impedance path to low frequency noise components. These low frequency noise components are therefore shunted to ground, and do not modulate the operation of the JFET (100). This significantly reduces noise in the oscillator output signal. A hot carrier diode (118) is connected across the gate-to-source junction of the JFET (100) to reduce loading on the tuned circuit (102) by the JFET (100).
Abstract: A phase detector which includes gated current generators for converting one of two signals which are to be phase compared into a periodic signal of generally triangular form. The other of the two signals triggers periodic sampling of the triangular signal. A "hold" capacitor stores the sampled signals between sampling intervals, and provides the phase detector output signal. Logic gating disables the current generators during the sampling intervals so that the amplitude of the triangular waveform will not change during those intervals.