Abstract: A method of wafer dicing includes singulating dies from a semiconductor wafer. The method further includes depositing a metal layer on back sides of the singulated dies, wherein a portion of the metal layer continues beyond the backs sides of the singulated dies to deposit at least partially on lateral sides of the singulated dies. A packaged die includes a semiconductor die and a metal outer layer deposited on the back side of the semiconductor die and on a portion of the lateral side of the semiconductor die nearest the back side. The packaged die further includes a substrate mounted to the back side of the semiconductor die a die attach material that bonds the substrate to the metal outer layer deposited on the semiconductor die, wherein the metal outer layer and the die attach material surround the back edge of the semiconductor die.

Abstract: A device wafer is provided that includes a substrate having major and minor surfaces, and a plurality of active devices located at the major surface. A eutectic alloy composition having a first thickness is formed at the minor surface of the substrate. The eutectic alloy composition is partially removed from the minor surface of the substrate such that a second thickness of the eutectic alloy composition remains on the minor surface, the second thickness being less than the first thickness. A bonding layer is deposited over the eutectic alloy composition. The bonding layer is utilized for joining semiconductor components of the device wafer to secondary structures.

Abstract: A device wafer is provided that includes a substrate having major and minor surfaces, and a plurality of active devices located at the major surface. A eutectic alloy composition is formed at the minor surface of the substrate. The eutectic alloy composition is removed from the minor surface of the substrate such that a portion of the eutectic alloy composition remains at an outer perimeter of the minor surface to strengthen the outer perimeter of the substrate. A bonding layer is deposited over the minor surface and over the portion of the eutectic alloy composition at the outer perimeter of the minor surface. The bonding layer is utilized for joining semiconductor components of the device wafer to secondary structures. Additional eutectic alloy composition may remain on the minor surface of the substrate at the streets to strengthen the substrate during device wafer separation.

Abstract: A device wafer is provided that includes a substrate having major and minor surfaces, and a plurality of active devices located at the major surface. A eutectic alloy composition having a first thickness is formed at the minor surface of the substrate. The eutectic alloy composition is partially removed from the minor surface of the substrate such that a second thickness of the eutectic alloy composition remains on the minor surface, the second thickness being less than the first thickness. A bonding layer is deposited over the eutectic alloy composition. The bonding layer is utilized for joining semiconductor components of the device wafer to secondary structures.

Abstract: A device wafer is provided that includes a substrate having major and minor surfaces, and a plurality of active devices located at the major surface. A eutectic alloy composition is formed at the minor surface of the substrate. The eutectic alloy composition is removed from the minor surface of the substrate such that a portion of the eutectic alloy composition remains at an outer perimeter of the minor surface to strengthen the outer perimeter of the substrate. A bonding layer is deposited over the minor surface and over the portion of the eutectic forming alloy composition at the outer perimeter of the minor surface. The bonding layer is utilized for joining semiconductor components of the device wafer to secondary structures. Additional eutectic alloy composition may remain on the minor surface of the substrate at the streets to strengthen the substrate during device wafer separation.

Abstract: A method of wafer dicing includes singulating dies from a semiconductor wafer. The method further includes depositing a metal layer on back sides of the singulated dies, wherein a portion of the metal layer continues beyond the backs sides of the singulated dies to deposit at least partially on lateral sides of the singulated dies. A packaged die includes a semiconductor die and a metal outer layer deposited on the back side of the semiconductor die and on a portion of the lateral side of the semiconductor die nearest the back side. The packaged die further includes a substrate mounted to the back side of the semiconductor die a die attach material that bonds the substrate to the metal outer layer deposited on the semiconductor die, wherein the metal outer layer and the die attach material surround the back edge of the semiconductor die.

Abstract: A method of wafer dicing includes singulating dies from a semiconductor wafer. The method further includes depositing a metal layer on back sides of the singulated dies, wherein a portion of the metal layer continues beyond the backs sides of the singulated dies to deposit at least partially on lateral sides of the singulated dies. A packaged die includes a semiconductor die and a metal outer layer deposited on the back side of the semiconductor die and on a portion of the lateral side of the semiconductor die nearest the back side. The packaged die further includes a substrate mounted to the back side of the semiconductor die a die attach material that bonds the substrate to the metal outer layer deposited on the semiconductor die, wherein the metal outer layer and the die attach material surround the back edge of the semiconductor die.

Abstract: In making electronic component packages, a method includes forming a sacrificial material over a first temporary substrate, applying a second temporary substrate to the sacrificial material, and then curing the sacrificial material. After curing, the second temporary substrate is removed. The top surface of the sacrificial layer is defined by the second temporary substrate. After removal, a redistribution structure is formed on the top surface. After the formation of the redistribution structure, electronic components are applied to the redistribution structure. The electronic components are encapsulated to form an encapsulated panel. The first temporary substrate and the sacrificial material are removed. The panel is singulated into multiple electronic component packages.

Abstract: A method of wafer dicing includes singulating dies from a semiconductor wafer. The method further includes depositing a metal layer on back sides of the singulated dies, wherein a portion of the metal layer continues beyond the backs sides of the singulated dies to deposit at least partially on lateral sides of the singulated dies. A packaged die includes a semiconductor die and a metal outer layer deposited on the back side of the semiconductor die and on a portion of the lateral side of the semiconductor die nearest the back side. The packaged die further includes a substrate mounted to the back side of the semiconductor die a die attach material that bonds the substrate to the metal outer layer deposited on the semiconductor die, wherein the metal outer layer and the die attach material surround the back edge of the semiconductor die.

Abstract: In making electronic component packages, a method includes forming a sacrificial material over a first temporary substrate, applying a second temporary substrate to the sacrificial material, and then curing the sacrificial material. After curing, the second temporary substrate is removed. The top surface of the sacrificial layer is defined by the second temporary substrate. After removal, a redistribution structure is formed on the top surface. After the formation of the redistribution structure, electronic components are applied to the redistribution structure. The electronic components are encapsulated to form an encapsulated panel. The first temporary substrate and the sacrificial material are removed. The panel is singulated into multiple electronic component packages.

Abstract: A semiconductor apparatus including a wafer base with a top side and a bottom side, a silver base with a top side and a bottom side, wherein the bottom side of the silver base is attached to the top side of the wafer base and wherein the silver base provides a reflective surface, and an aluminum nitride protective layer attached to the top side of the silver base, wherein the aluminum nitride protective layer shields the silver base from the environment.