Patents by Inventor Cole Smith

Cole Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250393214
    Abstract: Some embodiments include a method of forming an assembly (e.g., a memory array). A first opening is formed through a stack of alternating first and second levels. The first levels contain silicon nitride, and the second levels contain silicon dioxide. Some of the silicon dioxide of the second levels is replaced with memory cell structures. The memory cell structures include charge-storage regions adjacent charge-blocking regions. Tunneling material is formed within the first opening, and channel material is formed adjacent the tunneling material. A second opening is formed through the stack. The second opening extends through remaining portions of the silicon dioxide, and through the silicon nitride. The remaining portions of the silicon dioxide are removed to form cavities. Conductive regions are formed within the cavities. The silicon nitride is removed to form voids between the conductive regions. Some embodiments include memory arrays.
    Type: Application
    Filed: August 20, 2025
    Publication date: December 25, 2025
    Applicant: Micron Technology, Inc.
    Inventors: Changhan Kim, Chet E. Carter, Cole Smith, Collin Howder, Richard J. Hill, Jie Li
  • Patent number: 12408341
    Abstract: Some embodiments include a method of forming an assembly (e.g., a memory array). A first opening is formed through a stack of alternating first and second levels. The first levels contain silicon nitride, and the second levels contain silicon dioxide. Some of the silicon dioxide of the second levels is replaced with memory cell structures. The memory cell structures include charge-storage regions adjacent charge-blocking regions. Tunneling material is formed within the first opening, and channel material is formed adjacent the tunneling material. A second opening is formed through the stack. The second opening extends through remaining portions of the silicon dioxide, and through the silicon nitride. The remaining portions of the silicon dioxide are removed to form cavities. Conductive regions are formed within the cavities. The silicon nitride is removed to form voids between the conductive regions. Some embodiments include memory arrays.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: September 2, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Changhan Kim, Chet E. Carter, Cole Smith, Collin Howder, Richard J. Hill, Jie Li
  • Publication number: 20250160699
    Abstract: An exemplary system and method that non-invasively use re-perfused oxygen saturation signals from near-infrared spectroscopy signal (NIRS) measurement acquired after a microvascular-occluded-induced state to evaluate microvascular health in a subject. The exemplary system and method are configured to use a trained AI model (engineered features or deep learning model), or a classifier derived therefrom, to estimate for a perfusion index (can also be referred to as a reperfusion index due to the occlusion) that can be used to output an indicator for the presence and/or non-presence of microvascular dysfunction in a subject that exhibit abnormal NIRS observation when the subject is subject to an microvascular occlusion induced state. The exemplary system and method can be used to pre-screen for patients with onset microvascular or vascular abnormalities in the limbs to prescribe exercise therapy or drug therapy.
    Type: Application
    Filed: November 14, 2024
    Publication date: May 22, 2025
    Inventors: Judy M. Delp, Xiuwen Liu, Cesar Rodriguez, Cole Smith, Steven Gordon
  • Publication number: 20230153701
    Abstract: Systems and methods for facilitating reservations of shared desks, phone booths, and other spaces or areas within a workspace for members of the workspace are described. For example, a space reservation system receives a request to reserve a space for a member and selects a space suitable for the member based on one or more work environment characteristics associated with the space. The system also presents various interfaces for displaying available spaces and facilitating interactions between the member and the space.
    Type: Application
    Filed: July 21, 2022
    Publication date: May 18, 2023
    Inventors: Kyle Philip O'Keefe-Sally, Emiliano Burgos, Joshua James Emig, Jocelyn Masserot, Gregg John Meyer, Maria Soledad Medina, Cole Smith, Brandon Scot McGregor, Ubin Malla, Alan Edward Jackson
  • Patent number: 11641742
    Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. Horizontally-elongated trenches are formed into the stack to form laterally-spaced memory-block regions. A wall is formed in individual of the trenches laterally-between immediately-laterally-adjacent of the memory-block regions. The forming of the wall comprises lining sides of the trenches with insulative material comprising at least one of an insulative nitride and elemental-form boron. A core material is formed in the trenches to span laterally-between the at least one of the insulative nitride and the elemental-form boron. Structure independent of method is disclosed.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: May 2, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Cole Smith, Ramey M. Abdelrahaman, Silvia Borsari, Chris M. Carlson, David Daycock, Matthew J. King, Jin Lu
  • Publication number: 20230107370
    Abstract: Methods for generating a visualization of 3D data for a manufactured part are disclosed. The methods include scanning a part to obtain a digital representation, comparing the digital representation with a 3D model, and generating the visualization of the part having color and pattern shading to display portions of the part that topographically differ between the digital representation and the 3D model. Visualizations of 3D data for a manufactured part including a digital representation of the manufactured part as compared with a 3D model of the part are disclosed. The digital representation of the manufactured part illustrates the part having color and pattern shading to display portions of the part that topographically differ between the digital representation and the 3D model.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 6, 2023
    Inventors: Cole Smith, Corinne Drysdale, Bruce David Jones, David Steven Benhaim, Benjamin Hodsdon Gallup
  • Publication number: 20220199645
    Abstract: Some embodiments include a method of forming an assembly (e.g., a memory array). A first opening is formed through a stack of alternating first and second levels. The first levels contain silicon nitride, and the second levels contain silicon dioxide. Some of the silicon dioxide of the second levels is replaced with memory cell structures. The memory cell structures include charge-storage regions adjacent charge-blocking regions. Tunneling material is formed within the first opening, and channel material is formed adjacent the tunneling material. A second opening is formed through the stack. The second opening extends through remaining portions of the silicon dioxide, and through the silicon nitride. The remaining portions of the silicon dioxide are removed to form cavities. Conductive regions are formed within the cavities. The silicon nitride is removed to form voids between the conductive regions. Some embodiments include memory arrays.
    Type: Application
    Filed: March 10, 2022
    Publication date: June 23, 2022
    Applicant: Micron Technology, Inc.
    Inventors: Changhan Kim, Chet E. Carter, Cole Smith, Collin Howder, Richard J. Hill, Jie Li
  • Patent number: 11302708
    Abstract: Some embodiments include a method of forming an assembly (e.g., a memory array). A first opening is formed through a stack of alternating first and second levels. The first levels contain silicon nitride, and the second levels contain silicon dioxide. Some of the silicon dioxide of the second levels is replaced with memory cell structures. The memory cell structures include charge-storage regions adjacent charge-blocking regions. Tunneling material is formed within the first opening, and channel material is formed adjacent the tunneling material. A second opening is formed through the stack. The second opening extends through remaining portions of the silicon dioxide, and through the silicon nitride. The remaining portions of the silicon dioxide are removed to form cavities. Conductive regions are formed within the cavities. The silicon nitride is removed to form voids between the conductive regions. Some embodiments include memory arrays.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: April 12, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Changhan Kim, Chet E. Carter, Cole Smith, Collin Howder, Richard J. Hill, Jie Li
  • Publication number: 20210408039
    Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. Horizontally-elongated trenches are formed into the stack to form laterally-spaced memory-block regions. A wall is formed in individual of the trenches laterally-between immediately-laterally-adjacent of the memory-block regions. The forming of the wall comprises lining sides of the trenches with insulative material comprising at least one of an insulative nitride and elemental-form boron. A core material is formed in the trenches to span laterally-between the at least one of the insulative nitride and the elemental-form boron. Structure independent of method is disclosed.
    Type: Application
    Filed: September 7, 2021
    Publication date: December 30, 2021
    Applicant: Micron Technology, Inc.
    Inventors: Cole Smith, Ramey M. Abdelrahaman, Silvia Borsari, Chris M. Carlson, David Daycock, Matthew J. King, Jin Lu
  • Patent number: 11152388
    Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. Horizontally-elongated trenches are formed into the stack to form laterally-spaced memory-block regions. A wall is formed in individual of the trenches laterally-between immediately-laterally-adjacent of the memory-block regions. The forming of the wall comprises lining sides of the trenches with insulative material comprising at least one of an insulative nitride and elemental-form boron. A core material is formed in the trenches to span laterally-between the at least one of the insulative nitride and the elemental-form boron. Structure independent of method is disclosed.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: October 19, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Cole Smith, Ramey M. Abdelrahaman, Silvia Borsari, Chris M. Carlson, David Daycock, Matthew J. King, Jin Lu
  • Publication number: 20210111184
    Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. Horizontally-elongated trenches are formed into the stack to form laterally-spaced memory-block regions. A wall is formed in individual of the trenches laterally-between immediately-laterally-adjacent of the memory-block regions. The forming of the wall comprises lining sides of the trenches with insulative material comprising at least one of an insulative nitride and elemental-form boron. A core material is formed in the trenches to span laterally-between the at least one of the insulative nitride and the elemental-form boron. Structure independent of method is disclosed.
    Type: Application
    Filed: October 15, 2019
    Publication date: April 15, 2021
    Applicant: Micron Technology, Inc.
    Inventors: Cole Smith, Ramey M. Abdelrahaman, Silvia Borsari, Chris M. Carlson, David Daycock, Matthew J. King, Jin Lu
  • Publication number: 20200075630
    Abstract: Some embodiments include a method of forming an assembly (e.g., a memory array). A first opening is formed through a stack of alternating first and second levels. The first levels contain silicon nitride, and the second levels contain silicon dioxide. Some of the silicon dioxide of the second levels is replaced with memory cell structures. The memory cell structures include charge-storage regions adjacent charge-blocking regions. Tunneling material is formed within the first opening, and channel material is formed adjacent the tunneling material. A second opening is formed through the stack. The second opening extends through remaining portions of the silicon dioxide, and through the silicon nitride. The remaining portions of the silicon dioxide are removed to form cavities. Conductive regions are formed within the cavities. The silicon nitride is removed to form voids between the conductive regions. Some embodiments include memory arrays.
    Type: Application
    Filed: November 5, 2019
    Publication date: March 5, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Changhan Kim, Chet E. Carter, Cole Smith, Collin Howder, Richard J. Hill, Jie Li
  • Patent number: 10497715
    Abstract: Some embodiments include a method of forming an assembly (e.g., a memory array). A first opening is formed through a stack of alternating first and second levels. The first levels contain silicon nitride, and the second levels contain silicon dioxide. Some of the silicon dioxide of the second levels is replaced with memory cell structures. The memory cell structures include charge-storage regions adjacent charge-blocking regions. Tunneling material is formed within the first opening, and channel material is formed adjacent the tunneling material. A second opening is formed through the stack. The second opening extends through remaining portions of the silicon dioxide, and through the silicon nitride. The remaining portions of the silicon dioxide are removed to form cavities. Conductive regions are formed within the cavities. The silicon nitride is removed to form voids between the conductive regions. Some embodiments include memory arrays.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: December 3, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Changhan Kim, Chet E. Carter, Cole Smith, Collin Howder, Richard J. Hill, Jie Li
  • Publication number: 20190228348
    Abstract: Systems and methods for facilitating reservations of shared desks, phone booths, and other spaces or areas within a workspace for members of the workspace are described. For example, a space reservation system receives a request to reserve a space for a member and selects a space suitable for the member based on one or more work environment characteristics associated with the space. The system also presents various interfaces for displaying available spaces and facilitating interactions between the member and the space.
    Type: Application
    Filed: January 17, 2019
    Publication date: July 25, 2019
    Inventors: Kyle Philip O'Keefe-Sally, Emiliano Burgos, Joshua James Emig, Jocelyn Masserot, Gregg John Meyer, Maria Soledad Medina, Cole Smith, Brandon Scot McGregor, Ubin Malla, Alan Edward Jackson
  • Publication number: 20190198520
    Abstract: Some embodiments include a method of forming an assembly (e.g., a memory array). A first opening is formed through a stack of alternating first and second levels. The first levels contain silicon nitride, and the second levels contain silicon dioxide. Some of the silicon dioxide of the second levels is replaced with memory cell structures. The memory cell structures include charge-storage regions adjacent charge-blocking regions. Tunneling material is formed within the first opening, and channel material is formed adjacent the tunneling material. A second opening is formed through the stack. The second opening extends through remaining portions of the silicon dioxide, and through the silicon nitride. The remaining portions of the silicon dioxide are removed to form cavities. Conductive regions are formed within the cavities. The silicon nitride is removed to form voids between the conductive regions. Some embodiments include memory arrays.
    Type: Application
    Filed: April 9, 2018
    Publication date: June 27, 2019
    Applicant: Micron Technology, Inc.
    Inventors: Changhan Kim, Chet E. Carter, Cole Smith, Collin Howder, Richard J. Hill, Jie Li
  • Publication number: 20060032359
    Abstract: A stand for a musical instrument having a neck includes the case for the instrument which comprises a pair of case half sections hinged along one side edge and closable to form a rectangular housing for receiving the instrument and openable to a partly open angle where a bottom edge of the half sections can rest on a floor surface with the case standing upwardly from the floor surface, such that the hinge is vertical, to a top edge of each half section which is generally horizontal and a plate member which is shaped and arranged to sit on top of the half sections spanning the partly open case, the plate member having a front edge which has a recess therein shaped and arranged to receive the neck of the instrument so as to support the instrument between the sections within the open case above the floor surface.
    Type: Application
    Filed: August 8, 2005
    Publication date: February 16, 2006
    Inventor: Cole Smith