Patents by Inventor Colin B. Blundell
Colin B. Blundell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140075121Abstract: Techniques for conflict detection in hardware transactional memory (HTM) are provided. In one aspect, a method for detecting conflicts in HTM includes the following steps. Conflict detection is performed eagerly by setting read and write bits in a cache as transactions having read and write requests are made. A given one of the transactions is stalled when a conflict is detected whereby more than one of the transactions are accessing data in the cache in a conflicting way. An address of the conflicting data is placed in a predictor. The predictor is queried whenever the write requests are made to determine whether they correspond to entries in the predictor. A copy of the data corresponding to entries in the predictor is placed in a store buffer. The write bits in the cache are set and the copy of the data in the store buffer is merged in at transaction commit.Type: ApplicationFiled: October 5, 2012Publication date: March 13, 2014Applicant: International Business Machines CorporationInventors: Colin B. Blundell, Harold W. Cain, III, Jose E. Moreira
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Publication number: 20140075124Abstract: Techniques for conflict detection in hardware transactional memory (HTM) are provided. In one aspect, a method for detecting conflicts in HTM includes the following steps. Conflict detection is performed eagerly by setting read and write bits in a cache as transactions having read and write requests are made. A given one of the transactions is stalled when a conflict is detected whereby more than one of the transactions are accessing data in the cache in a conflicting way. An address of the conflicting data is placed in a predictor. The predictor is queried whenever the write requests are made to determine whether they correspond to entries in the predictor. A copy of the data corresponding to entries in the predictor is placed in a store buffer. The write bits in the cache are set and the copy of the data in the store buffer is merged in at transaction commit.Type: ApplicationFiled: September 7, 2012Publication date: March 13, 2014Applicant: International Business Machines CorporationInventors: Colin B. Blundell, Harold Wade Cain, III, Jose Eduardo Moreira
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Patent number: 8572341Abstract: A method, a system and a computer program product for handling speculative stores. The system determines when a speculative store buffer is not full. An indicator is generated when the speculative store buffer is not full, and the speculative stores are input into the speculative store buffer. When the speculative store buffer is full, a full buffer indicator is generated. Speculative stores prevented from entering the speculative store buffer are overflow stores. The overflow list is searched to determine whether one or more addresses of the overflow stores are present in the overflow list. When one or more addresses of the overflow stores are not present in the overflow list, the overflow stores are stored in the overflow list.Type: GrantFiled: September 15, 2009Date of Patent: October 29, 2013Assignee: International Business Machines CorporationInventors: Colin B. Blundell, Harold Wade Cain, III, Gheorghe C. Cascaval, Maged Milad Michael
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Patent number: 8392694Abstract: A method, system and computer program product for issuing one or more software initiated operations for creating a checkpoint of a register file and memory, and for restoring a register file and memory to the checkpointed state. At the execution of a checkpoint operation, the system returns a condition code indicating success or failure. When the condition code is set equal to one, one or more checkpoints are initiated. Contents of the register file and gated store buffer are stored each time the one or more checkpoints are initiated. When the checkpoint is created, the system notifies software when a hardware checkpoint capacity has been reached. One or more of the software checkpoint, hardware checkpoint, and handler checkpoint are utilized to provide a more precise point of restoration. During software execution, the register file and gated store buffer can be restored as defined by the one or more previous checkpoints.Type: GrantFiled: September 15, 2009Date of Patent: March 5, 2013Assignee: International Business Machines CorporationInventors: Colin B. Blundell, Harold Wade Cain, III, Gheorghe C. Cascaval, Maged Milad Michael
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Patent number: 8255626Abstract: Mechanisms for performing predicated atomic commits based on consistency of watches is provided. These mechanisms include executing, by a thread executing on a processor of the data processing system, an atomic release instruction. A determination is made as to whether a speculative store has been lost, due to an eviction of a memory block to which the speculative store is performed, since a previous atomic release instruction was processed. In response to the speculative store having been lost, invalidating, by the processor, speculative stores that have been performed since the previous atomic release instruction was processed. In addition, the method comprises, in response to the speculative store not having been lost, committing, by the processor, speculative stores that have been performed since the previous atomic release instruction was processed.Type: GrantFiled: December 9, 2009Date of Patent: August 28, 2012Assignee: International Business Machines CorporationInventors: Colin B. Blundell, Harold W. Cain, III, Gheorghe C. Cascaval, Maged M. Michael
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Publication number: 20110138126Abstract: Mechanisms for performing predicated atomic commits based on consistency of watches is provided. These mechanisms include executing, by a thread executing on a processor of the data processing system, an atomic release instruction. A determination is made as to whether a speculative store has been lost, due to an eviction of a memory block to which the speculative store is performed, since a previous atomic release instruction was processed. In response to the speculative store having been lost, invalidating, by the processor, speculative stores that have been performed since the previous atomic release instruction was processed. In addition, the method comprises, in response to the speculative store not having been lost, committing, by the processor, speculative stores that have been performed since the previous atomic release instruction was processed.Type: ApplicationFiled: December 9, 2009Publication date: June 9, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Colin B. Blundell, Harold W. Cain, III, Gheorghe C. Cascaval, Maged M. Michael
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Publication number: 20110066831Abstract: A method, system and computer program product for issuing one or more software initiated operations for creating a checkpoint of a register file and memory, and for restoring a register file and memory to the checkpointed state. At the execution of a checkpoint operation, the system returns a condition code indicating success or failure. When the condition code is set equal to one, one or more checkpoints are initiated. Contents of the register file and gated store buffer are stored each time the one or more checkpoints are initiated. When the checkpoint is created, the system notifies software when a hardware checkpoint capacity has been reached. One or more of the software checkpoint, hardware checkpoint, and handler checkpoint are utilized to provide a more precise point of restoration. During software execution, the register file and gated store buffer can be restored as defined by the one or more previous checkpoints.Type: ApplicationFiled: September 15, 2009Publication date: March 17, 2011Applicant: IBM CORPORATIONInventors: Colin B. Blundell, Harold W. Cain, III, Gheorghe C. Cascaval, Maged M. Michael
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Publication number: 20110066820Abstract: A method, a system and a computer program product for handling speculative stores. The system determines when a speculative store buffer is not full. An indicator is generated when the speculative store buffer is not full, and the speculative stores are input into the speculative store buffer. When the speculative store buffer is full, a full buffer indicator is generated. Speculative stores prevented from entering the speculative store buffer are overflow stores. The overflow list is searched to determine whether one or more addresses of the overflow stores are present in the overflow list. When one or more addresses of the overflow stores are not present in the overflow list, the overflow stores are stored in the overflow list.Type: ApplicationFiled: September 15, 2009Publication date: March 17, 2011Applicant: IBM CORPORATIONInventors: Colin B. Blundell, Harold W. Cain, III, Gheorghe C. Cascaval, Maged M. Michael