Abstract: The elements of a transform processing circuit are switchable to change the order of data in a data stream and/or to perform a fast Fourier transform (FFT) or inverse fast Fourier transform (IFFT) on the data stream. Each arithmetic circuit element performs an M-point butterfly operation on complex sample points and includes an adder/subtractor and a serial memory capable of storing M/2 sample points. Each multiplication unit performs an n-point complex twiddle factor operation on its input. The conjugator units conjugate inputted sample points. All circuit elements are connected to buses by switches. These connections are switchable so that in one switch state data input at left terminal flows to right terminal and in another state data input at right terminal flows to left terminal. The state of the bus switches also determines whether the circuit performs a FFT, an IFFT, or a bit reversal operation on input data.