Patents by Inventor Colin Gormley

Colin Gormley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6964882
    Abstract: A flip-bonding technique is used to fabricate complex micro-electromechanical systems. Various micromachined structures are fabricated on the front side of each of two wafers. One of the wafers is flipped over and bonded to the other wafer so that the front sides of the two wafers are bonded together in a flip-stacked configuration.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: November 15, 2005
    Assignee: Analog Devices, Inc.
    Inventors: Chang-Han Yun, Lawrence E. Felton, Maurice S. Karpman, John A. Yasaitis, Michael W. Judy, Colin Gormley
  • Patent number: 6933163
    Abstract: An intermediate electrode layer is used to fabricate an integrated micro-electromechanical system. An intermediate electrode layer is formed on an integrated circuit wafer. The intermediate electrode layer places drive electrodes a predetermined height above the surface of the integrated circuit wafer. A micro-electromechanical system wafer having micromachined optical mirrors is bonded to the integrated circuit wafer such that the drive electrodes are positioned a predetermined distance from the optical mirrors.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: August 23, 2005
    Assignee: Analog Devices, Inc.
    Inventors: Chang-Han Yun, Lawrence E. Felton, Maurice S. Karpman, John A. Yasaitis, Michael W. Judy, Colin Gormley
  • Publication number: 20050112884
    Abstract: A semiconductor wafer comprises an SOI comprising a device layer on an oxide layer supported on a handle layer. Micro-mirrors are formed in the device layer, and access bores extend through the handle layer and the oxide layer to the micro-mirrors for accommodating optical fibres to the micro-mirrors. The access bores are accurately aligned with the micro-mirrors, and the access bores are accurately-formed of circular cross-section. Each access bore comprises a tapered lead-in portion extending to a parallel portion. The diameter of the parallel portion is selected so that the optical fibres are a tight fit therein for securing the optical fibres in alignment with the micro-mirrors. The tapered lead-in portions of the access bores are formed to a first depth by a first dry isotropic etch for accurately forming the taper and the circular cross-section of the tapered lead-in portions.
    Type: Application
    Filed: October 22, 2004
    Publication date: May 26, 2005
    Inventor: Colin Gormley
  • Publication number: 20050095806
    Abstract: A method for forming an isolation filled trench (25) in a silicon layer (21) of an SOI structure (20). The trench (25) is relieved adjacent its open mouth (30) in order to displace the commencement of bridging of the trench (25) with the filling material, to a level (36) well below a first surface (27) of the silicon layer (21) for in turn displacing voids (35) from the open mouth (30) into the trench (25) below the level (36). The trench may be relieved by forming tapered portions (40) in the side wells (29) adjacent the open mouth (30), and/or by relieving one or more lining layers (32) in the trench (25) adjacent the open mouth (30) to form tapered portion (52) and (53). Instead of relieving the trench (25) by tapering the side walls (29) relieving recesses may be formed into the first surface (27) of the silicon layer (21) adjacent the open mouth (30).
    Type: Application
    Filed: October 31, 2003
    Publication date: May 5, 2005
    Inventors: William Nevin, Colin Gormley
  • Publication number: 20050045994
    Abstract: A method for forming a multi-layer semiconductor device (1) having a lower silicon layer (4), an intermediate silicon layer (5) within which micro-mirrors (10) are formed and an upper spacer layer (6) of silicon for spacing another component from the micro-mirrors (10). First and second etch stop layers (8, 9) of oxide act as insulation between the respective layers (4, 5, 6). In order to minimise damage to the micro-mirrors (10), the formation of the micro-mirrors (10) is left to the end of the forming process. An assembly of the lower layer (4) and the intermediate layer (5) with the fist etch stop layer (8) is formed, and the second etch stop layer (9) is than grown and patterned on the intermediate layer (5) for subsequent formation of the micro-mirrors (10). The upper layer (5) is then bonded by an annealing process to the is patterned second etch stop layer (9).
    Type: Application
    Filed: September 28, 2004
    Publication date: March 3, 2005
    Inventors: Colin Gormley, Stephen Brown, Scott Blackstone
  • Publication number: 20040063239
    Abstract: An intermediate electrode layer is used to fabricate an integrated micro-electromechanical system. An intermediate electrode layer is formed on an integrated circuit wafer. The intermediate electrode layer places drive electrodes a predetermined height above the surface of the integrated circuit wafer. A micro-electromechanical system wafer having micromachined optical mirrors is bonded to the integrated circuit wafer such that the drive electrodes are positioned a predetermined distance from the optical mirrors.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 1, 2004
    Inventors: Chang-Han Yun, Lawrence E. Felton, Maurice S. Karpman, John A. Yasaitis, Michael W. Judy, Colin Gormley
  • Publication number: 20040063237
    Abstract: A dummy handling substrate is used to form complex micro-electromechanical systems. A two-sided micromachined structure is fabricated by forming micromachined structures on a front side of a wafer, bonding the front side of the wafer to a dummy handling substrate, and forming micromachined structures on a back side of the wafer using the dummy handling substrate to handle the wafer during this back side processing. A second wafer containing micromachined features may be bonded to the back side of the first wafer using the dummy handling substrate to handle the first wafer during this bonding. The dummy handling substrate is removed from the front side of the wafer after back side processing and/or bonding of the second wafer.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 1, 2004
    Inventors: Chang-Han Yun, Lawrence E. Felton, Maurice S. Karpman, John A. Yasaitis, Michael W. Judy, Colin Gormley
  • Publication number: 20040061192
    Abstract: A flip-bonding technique is used to fabricate complex micro-electromechanical systems. Various micromachined structures are fabricated on the front side of each of two wafers. One of the wafers is flipped over and bonded to the other wafer so that the front sides of the two wafers are bonded together in a flip-stacked configuration.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 1, 2004
    Inventors: Chang-Han Yun, Lawrence E. Felton, Maurice S. Karpman, John A. Yasaitis, Michael W. Judy, Colin Gormley