Patents by Inventor Colin L. Perry

Colin L. Perry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180270948
    Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.
    Type: Application
    Filed: August 14, 2017
    Publication date: September 20, 2018
    Applicant: Intel Corporation
    Inventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
  • Patent number: 10015878
    Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: July 3, 2018
    Assignee: INTEL CORPORATION
    Inventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
  • Patent number: 9582977
    Abstract: A method monitors the consumption of materials, including determining the presence of materials in a smart receptacle using a sensor located in the smart receptacle. A server is alerted when an actionable item is detected.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: February 28, 2017
    Assignee: Intel Corporation
    Inventors: Nicholas P. Cowley, Ruchir Saraswat, Colin L. Perry, Matthew T. Aitken, Richard J. Goldman, Chi Man Kan
  • Patent number: 9577523
    Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: February 21, 2017
    Assignee: Intel Corporation
    Inventors: Nicholas P. Cowley, Andrew D. Talbot, Mark Mudd, Stephen J. Spinks, Keith Pinson, Colin L. Perry, Alan J. Martin, Chi Man Kan, Matthew T. Aitken, William L. Barber, Isaac Ali
  • Publication number: 20160309580
    Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.
    Type: Application
    Filed: November 19, 2015
    Publication date: October 20, 2016
    Applicant: INTEL CORPORATION
    Inventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
  • Publication number: 20160180679
    Abstract: A method monitors the consumption of materials, including determining the presence of materials in a smart receptacle using a sensor located in the smart receptacle. A server is alerted when an actionable item is detected.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Applicant: INTEL CORPORATION
    Inventors: Nicholas P. Cowley, Ruchir Saraswat, Colin L. Perry, Matthew T. Aitken, Richard J. Goldman, Chi Man Kan
  • Patent number: 9343963
    Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: May 17, 2016
    Assignee: Intel Corporation
    Inventors: Nicholas P. Cowley, Andrew D. Talbot, Isaac Ali, Keith Pinson, Colin L. Perry, Matthew T. Aitken, Chi Man Kan, Mark S. Mudd, Stephen J. Spinks, Alan J. Martin, William L. Barber
  • Publication number: 20160066724
    Abstract: Embodiments described herein relate generally to monitoring a dining session using smart smallwares. A smart smallware may sense usage or non-usage associated with a dining session of a customer. Based on the sensed non-usage of the smart smallware, the smart smallware may detect a period of inactivity. In response to the detected period of inactivity, the smart smallware may transmit an indication of the detected period of inactivity. This transmitted indication may cause an external monitoring device to notify a waitperson that a customer associated with that smart smallware may require attention. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 10, 2014
    Publication date: March 10, 2016
    Inventors: Nicholas P. Cowley, Ruchir Saraswat, Richard J. Goldman, Chi Man Kan, Matthew T. Aitken, Colin L. Perry
  • Patent number: 9225164
    Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: December 29, 2015
    Assignee: INTEL CORPORATION
    Inventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
  • Publication number: 20150131190
    Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.
    Type: Application
    Filed: November 6, 2014
    Publication date: May 14, 2015
    Inventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
  • Publication number: 20150042295
    Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.
    Type: Application
    Filed: March 1, 2012
    Publication date: February 12, 2015
    Inventors: Nicholas P. Cowley, Andrew D. Talbot, Mark Mudd, Stephen J. Spinks, Keith Pinson, Colin L. Perry, ALAN J. Martin, Chi Man Kan, Matthew T. Aitken, William L. Barber, Isaac Ali
  • Publication number: 20150035507
    Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.
    Type: Application
    Filed: December 22, 2011
    Publication date: February 5, 2015
    Inventors: Nicholas P. Cowley, Andrew D. Talbot, Isaac Ali, Keith Pinson, Colin L. Perry, Matthew T. Aitken, Chi Man Kan, Mark S. Mudd, Stephen J. Spinks, Alan J. Martin, William L. Barber
  • Patent number: 8913364
    Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: December 16, 2014
    Assignee: Intel Corporation
    Inventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
  • Publication number: 20130157482
    Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.
    Type: Application
    Filed: December 20, 2011
    Publication date: June 20, 2013
    Inventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
  • Patent number: 6043710
    Abstract: An amplifier comprises a common-base transistor 1 and a common-emitter transistor 2. The transistor 1 is arranged to receive an input signal applied to an input terminal 8 by an inductor 12 connected to its emitter. The transistor 2 is arranged to receive the input signal by a capacitor 13 connected to its base electrode. The transistors 1 and 2 are biased by a current mirror arrangement comprising a transistor 3 and a current source 16. Differential current output signals are provided on the collectors of the transistors 1 and 2.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: March 28, 2000
    Assignee: Mitel Semiconductor Limited
    Inventors: Jeffrey M.H Smith, Colin L Perry
  • Patent number: 5796294
    Abstract: A current reference cell is used to generate stable currents using a voltage reference source such as a band gap reference voltage in order that the output current I.sub.out can be proportional to absolute temperature, making the reference cell suitable for providing the bias current of a bipolar transistor in order that dynamic changes of collector current will be proportional to corresponding changes of base emitter voltage irrespective of temperature. The invention is concerned with rapidly turning off such a current I.sub.out, and a switch such as transistor Q7 is provided which is put into saturation when the reference voltage and hence reference cell are turned off, in order that current decaying via any large capacitor such as C1 connected to the output of the reference cell is diverted through such a switch rather than through the reference cell.
    Type: Grant
    Filed: June 19, 1996
    Date of Patent: August 18, 1998
    Assignee: Plessey Semiconductors Limited
    Inventor: Colin L. Perry
  • Patent number: 5023568
    Abstract: A combined current difference and operational amplifier circuit (10) for use either as or in a filter embodied in an integrated receiver includes inputs (I.sub.A and I.sub.B) for oppositely phased current signals which are applied to a current mirror circuit formed by first and second NPN transistors (Q1,Q2) having their bases connected to a junction (20). Equal value resistors (R1,R2) are serially connected in the emitter circuits of the first and second transistors, respectively and the current inputs are coupled to the free ends of the resistors. The base-collector path of a third NPN transistor (Q3) is connected between the free end of one of the resistors (R1) and the junction (20). A current difference signal (i.sub.b -i.sub.a) derived from the free end of the other one of the resistors is applied to the virtual ground input of an operational amplifier formed by a common emitter stage (Q4) coupled to an emitter follower (Q5).
    Type: Grant
    Filed: June 18, 1990
    Date of Patent: June 11, 1991
    Assignee: U.S. Philips Corporation
    Inventors: Paul A. Moore, Colin L. Perry, Johannes O. Voorman
  • Patent number: 4779056
    Abstract: A filter comprises an amplifier circuit arrangement having a signal input (1) and a signal output (8) and a coupling (36) between a point (37) on a signal path (39) to the signal input and a point (38) on a signal path from the signal output. The amplifier circuit arrangement comprises an inverting amplifier (6) to the input (5) of which the signal input (1) is connected via a series impedance (7), e.g. a resistor. A feedback impedance (9), e.g. a capacitor, connects the amplifier output (8) to its input so that this input constitutes a virtual ground. The phase relationship between the input and output signals of such an arrangement changes from inverting to non-inverting at frequencies at which the gain of the amplifier drops to below unity because of forward feed through the feedback impedance (9), thereby upsetting the phase relationship between the signals passing through the arrangement and those passing through the coupling. Accordingly, a further impedance (10), e.g.
    Type: Grant
    Filed: December 4, 1987
    Date of Patent: October 18, 1988
    Assignee: U.S. Philips Corporation
    Inventors: Paul A. Moore, Colin L. Perry