Patents by Inventor Colin L. Perry
Colin L. Perry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20180270948Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: ApplicationFiled: August 14, 2017Publication date: September 20, 2018Applicant: Intel CorporationInventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
-
Patent number: 10015878Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: GrantFiled: November 19, 2015Date of Patent: July 3, 2018Assignee: INTEL CORPORATIONInventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
-
Patent number: 9582977Abstract: A method monitors the consumption of materials, including determining the presence of materials in a smart receptacle using a sensor located in the smart receptacle. A server is alerted when an actionable item is detected.Type: GrantFiled: December 23, 2014Date of Patent: February 28, 2017Assignee: Intel CorporationInventors: Nicholas P. Cowley, Ruchir Saraswat, Colin L. Perry, Matthew T. Aitken, Richard J. Goldman, Chi Man Kan
-
Patent number: 9577523Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.Type: GrantFiled: March 1, 2012Date of Patent: February 21, 2017Assignee: Intel CorporationInventors: Nicholas P. Cowley, Andrew D. Talbot, Mark Mudd, Stephen J. Spinks, Keith Pinson, Colin L. Perry, Alan J. Martin, Chi Man Kan, Matthew T. Aitken, William L. Barber, Isaac Ali
-
Publication number: 20160309580Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: ApplicationFiled: November 19, 2015Publication date: October 20, 2016Applicant: INTEL CORPORATIONInventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
-
Publication number: 20160180679Abstract: A method monitors the consumption of materials, including determining the presence of materials in a smart receptacle using a sensor located in the smart receptacle. A server is alerted when an actionable item is detected.Type: ApplicationFiled: December 23, 2014Publication date: June 23, 2016Applicant: INTEL CORPORATIONInventors: Nicholas P. Cowley, Ruchir Saraswat, Colin L. Perry, Matthew T. Aitken, Richard J. Goldman, Chi Man Kan
-
Patent number: 9343963Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.Type: GrantFiled: December 22, 2011Date of Patent: May 17, 2016Assignee: Intel CorporationInventors: Nicholas P. Cowley, Andrew D. Talbot, Isaac Ali, Keith Pinson, Colin L. Perry, Matthew T. Aitken, Chi Man Kan, Mark S. Mudd, Stephen J. Spinks, Alan J. Martin, William L. Barber
-
Publication number: 20160066724Abstract: Embodiments described herein relate generally to monitoring a dining session using smart smallwares. A smart smallware may sense usage or non-usage associated with a dining session of a customer. Based on the sensed non-usage of the smart smallware, the smart smallware may detect a period of inactivity. In response to the detected period of inactivity, the smart smallware may transmit an indication of the detected period of inactivity. This transmitted indication may cause an external monitoring device to notify a waitperson that a customer associated with that smart smallware may require attention. Other embodiments may be described and/or claimed.Type: ApplicationFiled: September 10, 2014Publication date: March 10, 2016Inventors: Nicholas P. Cowley, Ruchir Saraswat, Richard J. Goldman, Chi Man Kan, Matthew T. Aitken, Colin L. Perry
-
Patent number: 9225164Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: GrantFiled: November 6, 2014Date of Patent: December 29, 2015Assignee: INTEL CORPORATIONInventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
-
Publication number: 20150131190Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: ApplicationFiled: November 6, 2014Publication date: May 14, 2015Inventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
-
Publication number: 20150042295Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.Type: ApplicationFiled: March 1, 2012Publication date: February 12, 2015Inventors: Nicholas P. Cowley, Andrew D. Talbot, Mark Mudd, Stephen J. Spinks, Keith Pinson, Colin L. Perry, ALAN J. Martin, Chi Man Kan, Matthew T. Aitken, William L. Barber, Isaac Ali
-
Publication number: 20150035507Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.Type: ApplicationFiled: December 22, 2011Publication date: February 5, 2015Inventors: Nicholas P. Cowley, Andrew D. Talbot, Isaac Ali, Keith Pinson, Colin L. Perry, Matthew T. Aitken, Chi Man Kan, Mark S. Mudd, Stephen J. Spinks, Alan J. Martin, William L. Barber
-
Patent number: 8913364Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: GrantFiled: December 20, 2011Date of Patent: December 16, 2014Assignee: Intel CorporationInventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
-
Publication number: 20130157482Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: ApplicationFiled: December 20, 2011Publication date: June 20, 2013Inventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
-
Patent number: 6043710Abstract: An amplifier comprises a common-base transistor 1 and a common-emitter transistor 2. The transistor 1 is arranged to receive an input signal applied to an input terminal 8 by an inductor 12 connected to its emitter. The transistor 2 is arranged to receive the input signal by a capacitor 13 connected to its base electrode. The transistors 1 and 2 are biased by a current mirror arrangement comprising a transistor 3 and a current source 16. Differential current output signals are provided on the collectors of the transistors 1 and 2.Type: GrantFiled: November 4, 1998Date of Patent: March 28, 2000Assignee: Mitel Semiconductor LimitedInventors: Jeffrey M.H Smith, Colin L Perry
-
Patent number: 5796294Abstract: A current reference cell is used to generate stable currents using a voltage reference source such as a band gap reference voltage in order that the output current I.sub.out can be proportional to absolute temperature, making the reference cell suitable for providing the bias current of a bipolar transistor in order that dynamic changes of collector current will be proportional to corresponding changes of base emitter voltage irrespective of temperature. The invention is concerned with rapidly turning off such a current I.sub.out, and a switch such as transistor Q7 is provided which is put into saturation when the reference voltage and hence reference cell are turned off, in order that current decaying via any large capacitor such as C1 connected to the output of the reference cell is diverted through such a switch rather than through the reference cell.Type: GrantFiled: June 19, 1996Date of Patent: August 18, 1998Assignee: Plessey Semiconductors LimitedInventor: Colin L. Perry
-
Patent number: 5023568Abstract: A combined current difference and operational amplifier circuit (10) for use either as or in a filter embodied in an integrated receiver includes inputs (I.sub.A and I.sub.B) for oppositely phased current signals which are applied to a current mirror circuit formed by first and second NPN transistors (Q1,Q2) having their bases connected to a junction (20). Equal value resistors (R1,R2) are serially connected in the emitter circuits of the first and second transistors, respectively and the current inputs are coupled to the free ends of the resistors. The base-collector path of a third NPN transistor (Q3) is connected between the free end of one of the resistors (R1) and the junction (20). A current difference signal (i.sub.b -i.sub.a) derived from the free end of the other one of the resistors is applied to the virtual ground input of an operational amplifier formed by a common emitter stage (Q4) coupled to an emitter follower (Q5).Type: GrantFiled: June 18, 1990Date of Patent: June 11, 1991Assignee: U.S. Philips CorporationInventors: Paul A. Moore, Colin L. Perry, Johannes O. Voorman
-
Patent number: 4779056Abstract: A filter comprises an amplifier circuit arrangement having a signal input (1) and a signal output (8) and a coupling (36) between a point (37) on a signal path (39) to the signal input and a point (38) on a signal path from the signal output. The amplifier circuit arrangement comprises an inverting amplifier (6) to the input (5) of which the signal input (1) is connected via a series impedance (7), e.g. a resistor. A feedback impedance (9), e.g. a capacitor, connects the amplifier output (8) to its input so that this input constitutes a virtual ground. The phase relationship between the input and output signals of such an arrangement changes from inverting to non-inverting at frequencies at which the gain of the amplifier drops to below unity because of forward feed through the feedback impedance (9), thereby upsetting the phase relationship between the signals passing through the arrangement and those passing through the coupling. Accordingly, a further impedance (10), e.g.Type: GrantFiled: December 4, 1987Date of Patent: October 18, 1988Assignee: U.S. Philips CorporationInventors: Paul A. Moore, Colin L. Perry