Patents by Inventor Colin Perry

Colin Perry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240108939
    Abstract: A weight training machine comprises: a motor; a line that is tensioned by the motor; a spool that takes up the line, wherein the spool includes a flange wherein the flange defines a capture region for the line; and a line guide adjacent to the spool, wherein the line guide prevents the line from persistently escaping from the capture region for the line.
    Type: Application
    Filed: September 11, 2023
    Publication date: April 4, 2024
    Inventors: Joseph Perry, David Jonathan Zimmer, Anya Richardson Quenon, David Mallard, Colin Russell Parker
  • Patent number: 7672653
    Abstract: Various embodiments are directed to removing interfering signals in a broadband radio frequency (RF) receiver by implementing a silicon tuner arranged to replicate high quality factor (Q) performance without the advantages of using high Q components available for module tuners. In one or more embodiments, tuned filter elements within a broadband silicon tuner are reused to maximize the attenuation of unwanted signals while minimizing induced undesirable channel ripple. In various implementations, a number of tuned passive inductor/capacitor filter elements are combined as required such that filter elements for an unused frequency band are reconfigured to provide attenuation of and enhanced immunity to unwanted signals. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: March 2, 2010
    Assignee: Intel Corporation
    Inventors: Nick Cowley, Sawyer Albert David, Mark Mudd, Richard Goldman, Colin Perry, Ruiyan Zhao
  • Patent number: 7626457
    Abstract: An Automatic Gain Control (AGC) module for controlling Noise Figure (NF) and IM characteristics therein is disclosed. The AGC module comprises a plurality of AGC stages. Each AGC stage comprises a differential amplifier circuit, an input signal transistor and a current-steering circuit. Differential amplifier circuits of the plurality of AGC stages receive control signals at their differential inputs and their output is connected to a common load. The input signal transistors of the plurality of AGC stages receive a common input signal and is further coupled to the differential amplifier circuit and the current-steering circuit. The current-steering circuits and the control signals at the differential amplifier circuits control gain of the each AGC stage of the plurality of AGC stage, which is used to control the NF and the IM characteristics.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: December 1, 2009
    Assignee: Intel Corporation
    Inventors: Mark Mudd, Isaac Ali, Ruiyan Zhao, Nick Cowley, Colin Perry, Richard Goldman
  • Publication number: 20090085660
    Abstract: An Automatic Gain Control (AGC) module for controlling Noise Figure (NF) and IM characteristics therein is disclosed. The AGC module comprises a plurality of AGC stages. Each AGC stage comprises a differential amplifier circuit, an input signal transistor and a current-steering circuit. Differential amplifier circuits of the plurality of AGC stages receive control signals at their differential inputs and their output is connected to a common load. The input signal transistors of the plurality of AGC stages receive a common input signal and is further coupled to the differential amplifier circuit and the current-steering circuit. The current-steering circuits and the control signals at the differential amplifier circuits control gain of the each AGC stage of the plurality of AGC stage, which is used to control the NF and the IM characteristics.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Applicant: INTEL CORPORATION
    Inventors: Mark Mudd, Isaac Ali, Ruiyan Zhao, Nick Cowley, Colin Perry, Richard Goldman
  • Publication number: 20080231759
    Abstract: Various embodiments are directed to removing interfering signals in a broadband radio frequency (RF) receiver by implementing a silicon tuner arranged to replicate high quality factor (Q) performance without the advantages of using high Q components available for module tuners. In one or more embodiments, tuned filter elements within a broadband silicon tuner are reused to maximize the attenuation of unwanted signals while minimizing induced undesirable channel ripple. In various implementations, a number of tuned passive inductor/capacitor filter elements are combined as required such that filter elements for an unused frequency band are reconfigured to provide attenuation of and enhanced immunity to unwanted signals. Other embodiments are described and claimed.
    Type: Application
    Filed: March 20, 2007
    Publication date: September 25, 2008
    Inventors: Nick Cowley, Sawyer Albert David, Mark Mudd, Richard Goldman, Colin Perry, Ruiyan Zhao
  • Publication number: 20070057744
    Abstract: A circuit arrangement having a plurality of variable capacitance elements such as varactors is described, the varactors having associated electronic control means which controls the capacitance of the variable capacitance elements over a control range. The control range is such that for any particular variable capacitance element a complete variation from a lowest to a highest capacitance is obtained from only a portion of the control range.
    Type: Application
    Filed: October 10, 2006
    Publication date: March 15, 2007
    Inventors: Colin Perry, Stephen Parry, Alessandro Deidda, Christopher Shepherd
  • Publication number: 20070030087
    Abstract: A variable capacitance network is disclosed, comprising a plurality of capacitance arms connected in parallel with each other between first and second terminals of the network. Each capacitance arm has a varactor and a series capacitor in series with the varactor A control input applies a common control signal to the junctions between the varactors and their associated series capacitors, to allow for simultaneous control of each varactor.
    Type: Application
    Filed: October 10, 2006
    Publication date: February 8, 2007
    Inventors: Colin Perry, Stephen Parry, Alessandro Deidda, Christopher Shepherd
  • Publication number: 20070030086
    Abstract: A variable capacitance network is disclosed, comprising a plurality of capacitance arms connected in parallel with each other between first and second terminals of the network. Each capacitance arm has a varactor and a series capacitor in series with the varactor A control input applies a common control signal to the junctions between the varactors and their associated series capacitors, to allow for simultaneous control of each varactor.
    Type: Application
    Filed: October 10, 2006
    Publication date: February 8, 2007
    Inventors: Colin Perry, Stephen Parry, Alessandro Deidda, Christopher Shepherd
  • Patent number: 7102437
    Abstract: An integrated circuit device includes an amplifier stage comprising a pair of transistors (134A, 134B), the respective bases or gates of which are connected together, as well as the respective emitters or sources. The respective drains or collectors of the transistors are capacitively coupled (166) so as to be effectively shorted at the frequencies of operation of the amplifier, A biasing circuit arrangement (144) is also provided which employs bias control feedback to set the bias currents for the transistors. The biasing circuit arrangement takes as its input the current flowing at one of the electrodes (160) of one of the transistors.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: September 5, 2006
    Assignee: Zarlink Semiconductor Limited
    Inventor: Colin Perry
  • Publication number: 20050231283
    Abstract: An integrated circuit device includes an amplifier stage comprising a pair of transistors (134A, 134B), the respective bases or gates of which are connected together, as well as the respective emitters or sources. The respective drains or collectors of the transistors are capacitively coupled (166) so as to be effectively shorted at the frequencies of operation of the amplifier, A biasing circuit arrangement (144) is also provided which employs bias control feedback to set the bias currents for the transistors. The biasing circuit arrangement takes as its input the current flowing at one of the electrodes (160) of one of the transistors.
    Type: Application
    Filed: September 9, 2004
    Publication date: October 20, 2005
    Inventor: Colin Perry
  • Publication number: 20050134395
    Abstract: A circuit arrangement having a plurality of variable capacitance elements such as varactors is described, the varactors having associated electronic control means which controls the capacitance of the variable capacitance elements over a control range. The control range is such that for any particular variable capacitance element a complete variation from a lowest to a highest capacitance is obtained from only a portion of the control range.
    Type: Application
    Filed: November 16, 2004
    Publication date: June 23, 2005
    Inventors: Colin Perry, Stephen Parry, Alessandro Deidda, Christopher Shepherd
  • Publication number: 20050128008
    Abstract: A variable capacitance network is disclosed, comprising a plurality of capacitance arms connected in parallel with each other between first and second terminals of the network. Each capacitance arm has a varactor and a series capacitor in series with the varactor A control input applies a common control signal to the junctions between the varactors and their associated series capacitors, to allow for simultaneous control of each varactor.
    Type: Application
    Filed: November 16, 2004
    Publication date: June 16, 2005
    Inventors: Colin Perry, Stephen Parry, Alessandro Deidda, Christopher Shepherd