Patents by Inventor Colin SPRINKLE

Colin SPRINKLE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Providing hints to an execution unit to prepare for predicted subsequent arithmetic operations
    Patent number: 11150721
    Abstract: A system and method are described for providing hints to a processing unit that subsequent operations are likely. Responsively, the processing unit takes steps to prepare for the likely subsequent operations. Where the hints are more likely than not to be correct, the processing unit operates more efficiently. For example, in an embodiment, the processing unit consumes less power. In another embodiment, subsequent operations are performed more quickly because the processing unit is prepared to efficiently handle the subsequent operations.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: October 19, 2021
    Assignee: NVIDIA Corporation
    Inventors: David Conrad Tannenbaum, Ming Y. Siu, Stuart F Oberman, Colin Sprinkle, Srinivasan Iyer, Ian Chi Yan Kwong
  • Approach to power reduction in floating-point operations
    Patent number: 9829956
    Abstract: An approach is provided for enabling power reduction in floating-point operations. In one example, a system receives floating-point numbers of a fused multiply-add instruction. The system determines the fused multiply-add instruction does not require compliance with a standard of precision for floating-point numbers. The system generates gating signals for an integrated circuit that is configured to perform operations of the fused multiply-add instruction. The system then sends the gating signals to the integrated circuit to turn off a plurality of logic gates included in the integrated circuit.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: November 28, 2017
    Assignee: NVIDIA Corporation
    Inventors: David Conrad Tannenbaum, Colin Sprinkle, Stuart F. Oberman, Ming Y. Siu, Srinivasan Iyer, Ian-Chi Yan Kwong
  • APPROACH TO POWER REDUCTION IN FLOATING-POINT OPERATIONS
    Publication number: 20140143564
    Abstract: An approach is provided for enabling power reduction in floating-point operations. In one example, a system receives floating-point numbers of a fused multiply-add instruction. The system determines the fused multiply-add instruction does not require compliance with a standard of precision for floating-point numbers. The system generates gating signals for an integrated circuit that is configured to perform operations of the fused multiply-add instruction. The system then sends the gating signals to the integrated circuit to turn off a plurality of logic gates included in the integrated circuit.
    Type: Application
    Filed: November 21, 2012
    Publication date: May 22, 2014
    Applicant: NVIDIA Corporation
    Inventors: David Conrad TANNENBAUM, Colin SPRINKLE, Stuart F. OBERMAN, Ming Y. SIU, Srinivasan IYER, Ian-Chi Yan KWONG
  • APPROACH FOR EFFICIENT ARITHMETIC OPERATIONS
    Publication number: 20140129807
    Abstract: A system and method are described for providing hints to a processing unit that subsequent operations are likely. Responsively, the processing unit takes steps to prepare for the likely subsequent operations. Where the hints are more likely than not to be correct, the processing unit operates more efficiently. For example, in an embodiment, the processing unit consumes less power. In another embodiment, subsequent operations are performed more quickly because the processing unit is prepared to efficiently handle the subsequent operations.
    Type: Application
    Filed: November 7, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: David Conrad TANNENBAUM, Ming Y. SIU, Stuart F. OBERMAN, Colin SPRINKLE, Srinivasan IYER, Ian Chi Yan KWONG