Patents by Inventor Colin Verrilli

Colin Verrilli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080089358
    Abstract: A system and method in accordance with the present invention allows for an adapter to be utilized in a server environment that can accommodate both a 10 G and a 1 G source utilizing the same pins. This is accomplished through the use of a high speed serializer/deserializer (high speed serdes) which can accommodate both data sources. The high speed serdes allows for the use of a relatively low reference clock speed on the NIC to provide the proper clocking of the data sources and also allows for different modes to be set to accommodate the different data sources. Finally the system allows for the adapter to use the same pins for multiple data sources.
    Type: Application
    Filed: December 10, 2007
    Publication date: April 17, 2008
    Applicant: International Business Machines Corporation
    Inventors: Claude BASSO, Jean CALVIGNAC, Chih-jen CHANG, Philippe DAMON, Natarajan VAIDHYANATHAN, Fabrice VERPLANKEN, Colin VERRILLI
  • Publication number: 20080016243
    Abstract: A forwarding table, in a network device such as a router, used to forward packets in a communications network includes indicia whose state determine whether information contained in the forwarding table or information contained in the header portion of a packet is to be used to forward the packet to the next hop (i.e. next point in the route).
    Type: Application
    Filed: July 11, 2007
    Publication date: January 17, 2008
    Inventors: Claude Basso, Natarajan Vaidhyanathan, Colin Verrilli
  • Publication number: 20070283286
    Abstract: A graphical user interface, method, and apparatus for configuring a logical partition (LPAR), comprises one or more screens for configuring an LPAR having allocated resources residing on a server computer, the LPAR being uniquely identified by a partition ID; the one or more screens comprising an SNA selection element configured for user-selection of a shared network adapter (SNA) ID from one or more available SNA IDs, wherein each selectable SNA ID uniquely identifies a respective SNA installed on the server computer; a physical port selection element configured for user-selection of a physical port ID from one or more physical port IDs each corresponding to a respective physical port, wherein the one or more physical port IDs uniquely identify all physical ports residing on the respective SNA for the selected SNA ID; and an active configure button which, when selected by a user, causes the display of one or more screens for configuring a logical shared adapter (LSA) associated with the respective SNA.
    Type: Application
    Filed: August 20, 2007
    Publication date: December 6, 2007
    Inventors: Shamsundar Ashok, Bryan Logan, Christopher McNeils, Joy Underhill, Colin Verrilli
  • Publication number: 20070223389
    Abstract: In a first aspect, a first method of transmitting a data packet is provided. The first method includes the steps of (1) for each connection from which a data packet may be transmitted, storing header data corresponding to the connection; (2) employing a user application to form header and payload data of a packet, wherein the user application is associated with a connection from which the packet is to be transmitted; and (3) while transmitting the packet, comparing one or more portions of the packet header data with the header data corresponding to the connection with which the user application is associated. Numerous other aspects are provided.
    Type: Application
    Filed: March 23, 2006
    Publication date: September 27, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Claude Basso, Jean Calvignac, Ronald Fuhs, Nathaniel Sellin, Colin Verrilli, Scott Willenborg
  • Publication number: 20060251120
    Abstract: An Ethernet adapter is disclosed. The Ethernet adapter comprises a plurality of layers for allowing the adapter to receive and transmit packets from and to a processor. The plurality of layers include a demultiplexing mechanism to allow for partitioning of the processor. A Host Ethernet Adapter (HEA) is an integrated Ethernet adapter providing a new approach to Ethernet and TCP acceleration. A set of TCP/IP acceleration features have been introduced in a toolkit approach: Servers TCP/IP stacks use these accelerators when and as required. The interface between the server and the network interface controller has been streamlined by bypassing the PCI bus. The HEA supports network virtualization. The HEA can be shared by multiple OSs providing the essential isolation and protection without affecting its performance.
    Type: Application
    Filed: April 1, 2005
    Publication date: November 9, 2006
    Inventors: Ravi Arimilli, Claude Basso, Jean Calvignac, Chih-Jen Chang, Philippe Damon, Ronald Fuhs, Satya Sharma, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin Verrilli, Scott Willenborg
  • Publication number: 20060221961
    Abstract: Providing communications between operating system partitions and a computer network. In one aspect, an apparatus for distributing network communications among multiple operating system partitions includes a physical port allowing communications between the network and the computer system, and logical ports associated with the physical port, where each logical port is associated with one of the operating system partitions. Each of the logical ports enables communication between a physical port and the associated operating system partition and allows configurability of network resources of the system. Other aspects include a logical switch for logical and physical ports, and packet queues for each connection and for each logical port.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Applicant: International Business Machines Corporation
    Inventors: Claude Basso, Jean Calvignac, Chih-Jen Chang, Philippe Damon, Ronald Fuhs, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin Verrilli, Scott Willenborg
  • Publication number: 20060221966
    Abstract: A method and system for performing a lookup for a packet in a computer network are disclosed. The packet includes a header. The method and system include providing a parser, providing a lookup engine coupled with the parser, and providing a processor coupled with the lookup engine. The parser is for parsing the packet for the header prior to receipt of the packet being completed. The lookup engine performs a lookup for the header and returns a resultant. In one aspect, the lookup includes performing a local lookup of a cache that includes resultants of previous lookups. The processor processes the resultant.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Applicant: International Business Machines Corporation
    Inventors: Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Ronald Fuhs, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin Verrilli, Scott Willenborg
  • Publication number: 20060222002
    Abstract: A system and method in accordance with the present invention allows for an adapter to be utilized in a server environment that can accommodate both a 10 G and a 1 G source utilizing the same pins. This is accomplished through the use of a high speed serializer/deserializer (high speed serdes) which can accommodate both data sources. The high speed serdes allows for the use of a relatively low reference clock speed on the NIC to provide the proper clocking of the data sources and also allows for different modes to be set to accommodate the different data sources. Finally the system allows for the adapter to use the same pins for multiple data sources.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Applicant: International Business Machines Corporation
    Inventors: Claude Basso, Jean Calvignac, Chih-Jen Chang, Philippe Damon, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin Verrilli
  • Publication number: 20060221989
    Abstract: A method and system for receiving packets in a computer network are disclosed. The method and system include providing at least one receive port, a buffer, a scheduler, and a wrap port. The buffer has an input coupled with the at least one receive port and an output. The scheduler has a first input coupled to the output of the buffer, a second input coupled to the wrap port, and an output.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Inventors: Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin Verrilli
  • Publication number: 20060221969
    Abstract: A system and method for computing a blind checksum includes a host Ethernet adapter (HEA) with a system for receiving a packet. The system determines whether or not the packet is in Internet protocol version four (IPv4). If the packet is not in IPv4, the system computes the checksum of the packet. If the packet is in IPv4, the system determines whether the packet is in transmission control protocol (TCP) or user datagram protocol (UDP). If the packet is not in either of TCP or UDP the system attaches a pseudo-header to the packet and computes the checksum of the packet based on the pseudo-header and the IPv4 standard.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Inventors: Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Ronald Fuhs, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin Verrilli, Scott Willenborg
  • Publication number: 20060221952
    Abstract: A system and method for parsing, filtering, and computing the checksum in a host Ethernet adapter (HEA) that is coupled to a host. The method includes receiving a part of a frame, wherein a plurality of parts of a frame constitute a entire frame. Next, parse the part of a frame before receiving the entire frame. The HEA computes a checksum of the part of a frame. The HEA filters the part of a frame based on a logical, port-specific policy and transmits the checksum to the host.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Inventors: Claude Basso, Jean Calvignac, Chih-Jen Chang, Philippe Damon, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin Verrilli
  • Publication number: 20060221953
    Abstract: Method and apparatus for providing a checksum in a network transmission. In one aspect of the invention, a checksum for a packet to be transmitted on a network is determined by retrieving packet information from a storage device, the packet information to be included in the packet to be transmitted. A blind checksum value is determined based on the retrieved packet information, and the blind checksum value is adjusted to a protocol checksum based on descriptor information describing the structure of the packet. The protocol checksum is inserted in the packet before the packet is transmitted.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Inventors: Claude Basso, Jean Calvignac, Chih-Jen Chang, Philippe Damon, Ronald Fuhs, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin Verrilli, Scott Willenborg
  • Publication number: 20060221951
    Abstract: A system and method for reducing latency in a host Ethernet adapter (HEA) includes the following. First, the HEA receives a packet with an internet protocol (IP) header and data in the HEA. The HEA parses a connection identifier from the IP header and accesses a negative cache in the HEA to determine if the connection identifier is not in a memory external to the HEA. The HEA applies a default treatment to the packet if the connection identifier is not in the memory, thereby reducing latency by decreasing access to the memory.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Applicant: International Business Machines Corporation
    Inventors: Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin Verrilli
  • Publication number: 20060221977
    Abstract: Method and apparatus for implementing use of a network connection table. In one aspect, searching for network connections includes receiving a packet, and zeroing particular fields of connection information from the packet if a new connection is to be established. The connection information is converted to an address for a location in a direct table using a table access process. The direct table stores patterns and reference information for new and existing connections. The connection information is compared with at least one pattern stored in the direct table at the address to find reference information for the received packet.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Applicant: International Business Machines Corporation
    Inventors: Claude Basso, Jean Calvignac, Chih-Jen Chang, Philippe Damon, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin Verrilli
  • Publication number: 20060200615
    Abstract: Systems and methods for adaptively mapping system memory address bits into an instruction tag and an index into the cache are disclosed. More particularly, hardware and software are disclosed for observing collisions that occur for a given mapping of system memory bits into a tag and an index. Based on the observations, an optimal mapping may be determined that minimizes collisions.
    Type: Application
    Filed: March 2, 2005
    Publication date: September 7, 2006
    Inventors: Claude Basso, Jean Calvignac, Chih-jen Chang, Harm Hofstee, Jens Leenstra, Hans-Werner Tast, Fabrice Verplanken, Colin Verrilli
  • Publication number: 20060168583
    Abstract: Systems and methods for distributing thread instructions in the pipeline of a multi-threading digital processor are disclosed. More particularly, hardware and software are disclosed for successively selecting threads in an ordered sequence for execution in the processor pipeline. If a thread to be selected cannot execute, then a complementary thread is selected for execution.
    Type: Application
    Filed: January 25, 2005
    Publication date: July 27, 2006
    Inventors: Claude Basso, Jean Calvignac, Chih-jen Chang, Gordon Davis, Harm Hofstee, Fabrice Verplanken, Colin Verrilli
  • Publication number: 20050209804
    Abstract: System and method for maintenance and examination of timers for a computer system having connections in a networking system. Timer values in a connection table each indicate a timeout for a timer for a connection, where each connection has multiple timers, and one of the timer values is written to a global timer array for each connection such that the global timer array can be scanned to determine when timeouts occur for active connections. Sparse restart of a timer includes restarting the timer if data is communicated with a connected computer before the timeout occurs and after a predetermined time interval after timer start, and not restarting the timer if data is communicated before the timeout occurs and within the predetermined interval after timer start.
    Type: Application
    Filed: March 17, 2004
    Publication date: September 22, 2005
    Applicant: International Business Machines Corporation
    Inventors: Claude Basso, Richard Blasiak, Philippe Damon, Laurent Frelechoux, Brahmanand Gorti, Bernard Metzler, Bay Nguyen, Natarajan Vaidhyanathan, Colin Verrilli
  • Publication number: 20050108397
    Abstract: A method, computer program product and system for reducing the number of messages to be processed by a control processor in a load balancer. A network processor instead of the control processor in the load balancer may establish and terminate a TCP connection between a client and the load balancer and between the load balancer and a server. Further, messages, e.g., data and control messages, may be bundled into a single message to be transmitted between the network processor and the control processor. By bundling messages into a single message as well as offloading the establishment and termination of TCP connections to the network processor instead of the control processor, the number of messages to be processed by the control processor is reduced. Consequently, the performance of the load balancer is improved.
    Type: Application
    Filed: November 14, 2003
    Publication date: May 19, 2005
    Applicant: International Business Machines Corporation
    Inventors: Claude Basso, Philippe Damon, Stephen Fontes, Colin Verrilli
  • Publication number: 20050060428
    Abstract: The classification system of a network device includes a cache in which a mapping between predefined characteristics of TCP/IP packets and associated actions are stored in response to the first “Frequent Flyer” packet in of a session. Selected characteristics from subsequent received packets of that session are correlated with the predefined characteristics and the stored actions are applied to the received packets if the selected characteristics and the predefined characteristics match, thus reducing the processing required for subsequent packets. The packets selected for caching may be data packets. For mismatched characteristics, the full packet search of the classification system is used to determine the action to apply to the received packet.
    Type: Application
    Filed: September 11, 2003
    Publication date: March 17, 2005
    Applicant: International Business Machines Corporation
    Inventors: Everett Corl, Gordon Davis, Clark Jeffries, Natarajan Vaidhyanathan, Colin Verrilli
  • Publication number: 20050050018
    Abstract: Dynamic data search structures are described that are capable of handling large numbers of active entries and a high rate of additions and deletions of active entries while complying with 2MSL requirements and providing precise time-out capabilities. A free queue which is integrated with the timing loop of session entries provides available sessions for new entries in the search structure and removes obsolete sessions from the tree. Multiples of such timing loops can be used to maintain multiple timing intervals. One such timing loop may contain soft entries still attached to the search structure but which are eligible to be removed and to be reused to accommodate new sessions. A spare buffer pool is also included in the data structure to add and remove buffers to maintain delays.
    Type: Application
    Filed: September 3, 2003
    Publication date: March 3, 2005
    Applicant: International Business Machines Corporation
    Inventors: Claude Basso, Gordon Davis, Marco Heddes, Dongming Hwang, Colin Verrilli