Abstract: Disclosed in this disclosure is a method for super-resolution microscopic interferometric measurement based on broadband annular radially polarized light, where a broad-spectrum light source with an extended surface is selected; uniform illumination covering a to-be-tested FOV and having a certain aperture angle is provided using a Kohler illumination system; a two-stage relay system is designed, and amplitude and polarization of a full-FOV beam is modulated by a liquid crystal spatial light modulator and a vortex waveplate; broadband annular radially polarized light is focused based on the extended surface light source and a microscopic objective lens with a high numerical aperture to implement super-resolution microscopic interference imaging of a sample; and super-resolution topography measurement directed at a surface of a microstructure is implemented combined with phase-shifting interferometry.

Abstract: An LC fiber optic connector is disclosed in the present application, and the LC fiber optic connector includes a duplex socket, a ferrule assembly and a tail boot assembly, the ferrule assembly includes an outer frame bushing, an inner frame bushing, a ferrule and a spring disposed within the inner frame bushing; the tail boot assembly includes a front boot and a tail boot located at a rear end of the front boot, the rotating bushing is integrally formed with an elastic buckle, a rear end of the elastic buckle extends with an unlocking pressing portion, a resisting portion is located inside the unlocking through hole of the unlocking press portion, and the resisting portion includes an inclined surface, a inclined rod of the front boot extends into the unlocking through hole and cooperates with the inclined surface.

Abstract: The present invention relates to a cabazitaxel prodrug anti-tumor preparation, designs and synthesizes a small molecule cabazitaxel prodrug with branched fatty alcohol involving formulas (I), (II) and (III) and containing different fatty alcohol side chains and different linking chains, and prepares a self-assembled nanoparticle. Results showed that the self-assembled nanoparticle of the small molecule cabazitaxel prodrug with branched fatty alcohol can effectively improve the efficacy of cabazitaxel, reduce toxic and side effects.

Abstract: In certain aspects, a memory device includes memory cells, word lines coupled to the memory cells, and a peripheral circuit coupled to the word lines. The peripheral circuit is configured to apply first program pulses to a selected word line of the word lines in a first program operation. The first program operation includes a first number of occurrences of suspensions and a limit on a second number of the first program pulses. The peripheral circuit is also configured to apply second program pulses to the selected word line in a second program operation. The second program operation includes a third number of occurrences of suspensions and a limit on a fourth number of the second program pulses. The first number is greater than the third number, and the second number is greater than the fourth number.

Abstract: In certain aspects, a memory device includes memory cells, word lines coupled to the memory cells, and a peripheral circuit coupled to the memory cells. The peripheral circuit is coupled to the word lines and configured to apply program pulses to a selected word line of the word lines in a program operation, obtain a number of occurrences of suspensions during the program operation, and determine a limit on a number of program pulses for the program operation based on the number of occurrences of the suspensions during the program operation.

Abstract: An LC dustproof adapter is disclosed in the present application, and the LC dustproof adapter of the present application has a smaller gap and better dustproof performance. The LC dustproof adapter includes a housing, a bushing disposed in an inner cavity of the housing and a ceramic sleeve disposed in the bushing, a dustproof mechanism is disposed in a socket of the housing, the dustproof mechanism comprises a shutter and a slider, the shutter rotatably is disposed at a bottom of the socket of the housing, the slider is slidably disposed at a top of the socket of the housing, the shutter is provided with a first elastic resetting member and the slider is provided with a second elastic resetting member, the shutter and the slider are mutually closed under action of the first elastic resetting member and the second elastic resetting member.

Abstract: A memory device includes a memory block including memory strings, bit lines coupled to the memory strings, dummy word lines coupled to the dummy cells, first select lines coupled to the first select transistors, and a peripheral circuit coupled to the bit lines, the dummy word lines, and the first select lines. Each of the memory strings includes memory cells, first select transistors, and dummy cells. The peripheral circuit is configured to apply a turn on voltage on the first select lines, and apply a program voltage on a first dummy word line of the dummy word lines to program all dummy cells coupled to the first dummy word line.

Abstract: A memory device includes a memory cell array including memory blocks and a peripheral circuit coupled to the memory cell array. Each memory block includes memory strings each including dummy cells and select transistors, bit lines coupled to the memory strings, select lines including first select lines and second select lines, and one or more dummy word lines. Each select line coupled to the select transistors. The first select lines are closer to the bit lines than the second select lines. Each dummy word line is coupled to the respective dummy cells. The dummy word lines include a first dummy word line adjacent to either the first select lines or the second select lines. The peripheral circuit is configured to apply a turn-on voltage to all the first select lines, and apply a program voltage to the first dummy word line.

Abstract: The present application discloses a compression method, a coding method, a compression device and a coding device for a video coding reference block, including: step S000: dividing the reference block into several pixel blocks; step S100: selecting a pixel block; step S200: directly saving the original pixel value of each pixel in the first region; step S300: performing horizontal DPCM prediction on each pixel in the second region and calculating same to obtain a predictive residual, and performing vertical DPCM prediction on each pixel in the third region and calculating same to obtain a predictive residual; and step S400: obtaining for each pixel in the fourth region a predictive value and a predictive residual according to a pixel value relationship of several neighborhood pixels in the horizontal direction and the vertical direction.

Abstract: In certain aspects, a memory device includes memory cells, word lines coupled to the memory cells, and a peripheral circuit coupled to the memory cells. The peripheral circuit is coupled to the word lines and configured to apply program pulses to a selected word line of the word lines in a program operation, obtain a number of occurrences of suspensions during the program operation, and determine a limit on a number of program pulses for the program operation based on the number of occurrences of the suspensions during the program operation.

Abstract: In certain aspects, a memory device includes memory cells, and a peripheral circuit coupled to the memory cells. The peripheral circuit is configured to initiate a program operation on a selected memory cell of the memory cells, obtain a number of occurrences of one or more suspensions during the program operation, and determine a program pulse limit for the program operation based on the number of occurrences of the suspensions.

Abstract: In certain aspects, a memory device includes memory cells, and a peripheral circuit coupled to the memory cells. The peripheral circuit is configured to initiate a program operation on a selected memory cell of the memory cells, obtain a number of occurrences of one or more suspensions during the program operation, and determine a program pulse limit for the program operation based on the number of occurrences of the suspensions.

Abstract: A memory device includes a memory cell array including memory blocks and a peripheral circuit coupled to the memory cell array. Each memory block includes memory strings each including dummy cells and select transistors, bit lines coupled to the memory strings, select lines including first select lines and second select lines, and one or more dummy word lines. Each select line coupled to the select transistors. The first select lines are closer to the bit lines than the second select lines. Each dummy word line is coupled to the respective dummy cells. The dummy word lines include a first dummy word line adjacent to either the first select lines or the second select lines. The peripheral circuit is configured to apply a turn-on voltage to all the first select lines, and apply a program voltage to the first dummy word line.

Abstract: The present invention provides a display, the display includes: an array substrate; a color filter substrate disposed above the array substrate; a backlight disposed on the color filter substrate; and a reflector disposed on the backlight.

Abstract: The present disclosure provides a display device, including a housing, an air tunnel, and a functional device. The housing includes an air inlet and an air outlet, wherein the air inlet and the air outlet are disposed on two sides of the housing opposite to each other. The air tunnel is disposed in the housing and extends from the air inlet to the air outlet; and the functional device is disposed in the housing and located outside the air tunnel.

Abstract: The present disclosure provides a display device, including a housing, an air tunnel, and a functional device. The housing includes an air inlet and an air outlet, wherein the air inlet and the air outlet are disposed on two sides of the housing opposite to each other. The air tunnel is disposed in the housing and extends from the air inlet to the air outlet; and the functional device is disposed in the housing and located outside the air tunnel.

Abstract: A convolutional neural network hardware acceleration device, a convolutional calculation method, and a storage medium are provided. The device includes an instruction processing element (1), a hardware acceleration component (2), and an external data memory element (3). The instruction processing element (1) decodes instructions, and controls the hardware acceleration component (2) to perform operations corresponding to decoded instructions. The hardware acceleration component (2) includes: an input buffer element (21), a data calculation element (22) and an output buffer element (23). The external data memory element (3) stores the calculation result output by the output buffer element (23) and transmits the data to the input buffer element (21).