Patents by Inventor Conghui LIU
Conghui LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12183795Abstract: The present invention provides a device having a trench gate structure and a method of making the same. The device comprises a substrate, a drift region, a well region, a trench gate, a heavily-doped region, and an electrode positioned on the heavily-doped region. The structure of the device is simple to provide good VDMOS and IGBT breakdown voltages, and meanwhile take on-state resistance and reliability of oxide into account.Type: GrantFiled: March 29, 2022Date of Patent: December 31, 2024Assignee: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Conghui Liu, Peng Li, Min-Hwa Chi
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Patent number: 12154943Abstract: The present invention provides a power device with super junction structure (or referred to as super junction power device) and a method of making the same. When making a super junction power device, impurity of a second conductive type may be implanted into an epitaxial layer of a first conductive type to form a floating island of the second conductive type and a pillar of the second conductive type successively through a super junction mask (or reticle) after forming the epitaxial layer of the first conductive type, directly through a well mask (or reticle) before or after forming a well region of the second conductive type, and directly through a contact mask (or reticle) before or after forming a contact structure. Multiple epitaxial processes and deep trench etching process may not be needed. Therefore, the process is simple, the cost is low and yield and reliability are high.Type: GrantFiled: June 11, 2021Date of Patent: November 26, 2024Assignee: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa Chi, Conghui Liu, Huan Wang, Longkang Yang
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Patent number: 12154944Abstract: The present invention provides a power device with super junction structure (or referred to as super junction power device). When making a super junction power device, impurity of a second conductive type may be implanted into an epitaxial layer of a first conductive type to form a floating island of the second conductive type and a pillar of the second conductive type successively through a super junction mask (or reticle) after forming the epitaxial layer of the first conductive type, directly through a well mask (or reticle) before or after forming a well of the second conductive type, and directly through a contact mask (or reticle) before or after forming a contact structure. Multiple epitaxial processes and deep trench etching process may not be needed. Therefore, the process is simple, the cost is low and yield and reliability are high.Type: GrantFiled: June 13, 2023Date of Patent: November 26, 2024Assignee: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa Chi, Conghui Liu, Huan Wang, Longkang Yang
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Patent number: 12136647Abstract: The present invention provides a power device with super junction structure (or referred to as super junction power device) and a method of making the same. A floating island of a second conductivity type of a cell region, a floating island of the second conductivity type of a termination region, a pillar of the second conductivity type of the cell region and a pillar of the second conductivity type of the termination region may be formed through adding a super junction mask (or reticle) after forming the epitaxial layer of a first conductivity type, through a well mask (or reticle) before or after forming a well of the second conductivity type, and through a contact mask (or reticle) before or after forming a contact structure. Therefore, the process is simple, the cost is low and yield and reliability are high.Type: GrantFiled: June 11, 2021Date of Patent: November 5, 2024Assignee: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa Chi, Conghui Liu, Huan Wang, Longkang Yang, Richard Ru-Gin Chang
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Patent number: 11984500Abstract: The invention provides a multi-Vt vertical power device and a method of making the same. Through patterning a contact mask, a contact structure array having a shared trench gate structure may be formed, and different traversal gaps between an edge of a contact portion of a second conductivity type and an edge of a trench may be formed in the contact structure array. As such, multi-Vt vertical states may be implemented for storing information. The present invention allows making a multi-Vt vertical power device having different Vt's to be capable to store information without additional process steps. Therefore, with respect to the present invention, the process is simple, cost is low, and application field is wide; number of Vt varies to store multi-bit digital information or analog information in the power device; the built-in multi-Vt power MOSFET and IGBT are adapted not only for the high power applications but also for information storage.Type: GrantFiled: November 15, 2021Date of Patent: May 14, 2024Assignee: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa Chi, Dongyang Zhou, Jinpeng Qiu, Peng Li, Conghui Liu
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Publication number: 20230326962Abstract: The present invention provides a power device with super junction structure (or referred to as super junction power device). When making a super junction power device, impurity of a second conductive type may be implanted into an epitaxial layer of a first conductive type to form a floating island of the second conductive type and a pillar of the second conductive type successively through a super junction mask (or reticle) after forming the epitaxial layer of the first conductive type, directly through a well mask (or reticle) before or after forming a well of the second conductive type, and directly through a contact mask (or reticle) before or after forming a contact structure. Multiple epitaxial processes and deep trench etching process may not be needed. Therefore, the process is simple, the cost is low and yield and reliability are high.Type: ApplicationFiled: June 13, 2023Publication date: October 12, 2023Applicant: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa CHI, Conghui LIU, Huan WANG, Longkang YANG
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Patent number: 11715758Abstract: The present invention provides a power device with super junction structure (or referred to as super junction power device) and a method of making the same. When making a super junction power device, impurity of a second conductive type may be implanted into an epitaxial layer of a first conductive type to form a floating island of the second conductive type and a pillar of the second conductive type successively through a super junction mask (or reticle) after forming the epitaxial layer of the first conductive type, directly through a well mask (or reticle) before or after forming a well of the second conductive type, and directly through a contact mask (or reticle) before or after forming a contact structure. Multiple epitaxial processes and deep trench etching process may not be needed. Therefore, the process is simple, the cost is low and yield and reliability are high.Type: GrantFiled: June 11, 2021Date of Patent: August 1, 2023Assignee: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa Chi, Conghui Liu, Huan Wang, Longkang Yang
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Patent number: 11677019Abstract: The present application provides an insulated gate bipolar transistor (IGBT) device with narrow mesa and a manufacture thereof. The device comprises: a semiconductor substrate; gate trench structures and emitter trench structures formed on front surface of the semiconductor substrate and alternately arranged along with horizontal direction; wherein the gate trench structures and the emitter trench structures are respectively set in pair along with the arrangement direction, and the pairs of the gate trench structures and the pairs of the emitter trench structures are set in alternate arrangement along with the arrangement direction; well regions formed between the emitter trench structures of one pair; emitter injection regions formed between the gate trench structures of one pair and between the emitter trench structures of one pair, respectively; and wherein, in the region between the emitter trench structures of the one pair, the emitter injection region is above the well region.Type: GrantFiled: June 15, 2021Date of Patent: June 13, 2023Assignee: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa Chi, Ching-Ju Lin, Ying-Tsung Wu, Conghui Liu, Longkang Yang, Huan Wang, Richard Ru-Gin Chang
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Publication number: 20220320303Abstract: The present invention provides a device having a trench gate structure and a method of making the same. The device comprises a substrate, a drift region, a well region, a trench gate, a heavily-doped region, and an electrode positioned on the heavily-doped region. The structure of the device is simple to provide good VDMOS and IGBT breakdown voltages, and meanwhile take on-state resistance and reliability of oxide into account.Type: ApplicationFiled: March 29, 2022Publication date: October 6, 2022Applicant: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Conghui LIU, Peng LI, Min-Hwa CHI
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Patent number: 11379063Abstract: An organic light-emitting display panel and fabrication method thereof are provided. The organic light-emitting display panel includes an organic light-emitting element array substrate, a thin film encapsulation layer covering the organic light-emitting element array substrate, and touch-control electrodes. The thin film encapsulation layer includes at least one inorganic layer and at least one organic layer. First groove structures are configured in at least one organic layer, and sidewalls of the first groove structures are arc-shaped. The touch-control electrodes are disposed in the first groove structures.Type: GrantFiled: November 8, 2019Date of Patent: July 5, 2022Assignees: Shanghai Tianma Micro-Electronics Co., Ltd., Tianma Micro-Electronics Co., Ltd.Inventors: Yu Cai, Xuening Liu, Heeyol Lee, Quanpeng Yu, Conghui Liu
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Publication number: 20220208765Abstract: This invention provides a multi-Vt vertical power device and a method of making the same. Through a contact mask, a contact structure array having a shared trench gate structure may be formed, the same traversal gaps between an edge of a contact portion of a second conductivity type of the same set and an edge of a trench may be formed in the contact structure array, and different traversal gaps between an edge of the contact portion of the second conductivity type of different sets and an edge of the trench may be formed in the contact structure array. As such, multi-Vt states may be implemented for storing digital information. The present invention allows making a multi-Vt vertical power device having a number of Vt's to be capable of storing same number of bits digital information without additional process steps.Type: ApplicationFiled: November 15, 2021Publication date: June 30, 2022Applicant: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa CHI, Jinpeng QIU, Dongyang ZHOU, Peng LI, Conghui LIU
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Publication number: 20220209005Abstract: The invention provides a multi-Vt vertical power device and a method of making the same. Through patterning a contact mask, a contact structure array having a shared trench gate structure may be formed, and different traversal gaps between an edge of a contact portion of a second conductivity type and an edge of a trench may be formed in the contact structure array. As such, multi-Vt vertical states may be implemented for storing information. The present invention allows making a multi-Vt vertical power device having different Vt's to be capable to store information without additional process steps. Therefore, with respect to the present invention, the process is simple, cost is low, and application field is wide; number of Vt varies to store multi-bit digital information or analog information in the power device; the built-in multi-Vt power MOSFET and IGBT are adapted not only for the high power applications but also for information storage.Type: ApplicationFiled: November 15, 2021Publication date: June 30, 2022Applicant: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa CHI, Dongyang ZHOU, Jinpeng QIU, Peng LI, Conghui LIU
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Publication number: 20210391419Abstract: The present invention provides a power device with super junction structure (or referred to as super junction power device) and a method of making the same. A floating island of a second conductivity type of a cell region, a floating island of the second conductivity type of a termination region, a pillar of the second conductivity type of the cell region and a pillar of the second conductivity type of the termination region may be formed through adding a super junction mask (or reticle) after forming the epitaxial layer of a first conductivity type, through a well mask (or reticle) before or after forming a well of the second conductivity type, and through a contact mask (or reticle) before or after forming a contact structure. Therefore, the process is simple, the cost is low and yield and reliability are high.Type: ApplicationFiled: June 11, 2021Publication date: December 16, 2021Applicant: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa CHI, Conghui LIU, Huan WANG, Longkang YANG, Richard Ru-Gin CHANG
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Publication number: 20210391418Abstract: The present invention provides a power device with super junction structure (or referred to as super junction power device) in both cell region and edge termination region and a method of making the same. A floating island of a second conductivity type of a cell region, a floating island of the second conductivity type of a termination region, a pillar of the second conductivity type of the cell region and a pillar of the second conductivity type of the termination region may be formed through adding a super junction mask (or reticle) after forming the epitaxial layer of a first conductivity type, through a well mask (or reticle) before or after forming a well of the second conductivity type, and through a contact mask (or reticle) before or after forming a contact structure. Multiple epitaxial processes and deep trench etching process may not be needed. Therefore, the process is simple, the cost is low and yield and reliability are high.Type: ApplicationFiled: June 11, 2021Publication date: December 16, 2021Applicant: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa CHI, Conghui LIU, Huan WANG, Longkang YANG, Richard Ru-Gin CHANG
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Publication number: 20210391417Abstract: The present invention provides a power device with super junction structure (or referred to as super junction power device) and a method of making the same. When making a super junction power device, impurity of a second conductive type may be implanted into an epitaxial layer of a first conductive type to form a floating island of the second conductive type and a pillar of the second conductive type successively through a super junction mask (or reticle) after forming the epitaxial layer of the first conductive type, directly through a well mask (or reticle) before or after forming a well of the second conductive type, and directly through a contact mask (or reticle) before or after forming a contact structure. Multiple epitaxial processes and deep trench etching process may not be needed. Therefore, the process is simple, the cost is low and yield and reliability are high.Type: ApplicationFiled: June 11, 2021Publication date: December 16, 2021Applicant: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa CHI, Conghui LIU, Huan WANG, Longkang YANG
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Publication number: 20210391453Abstract: The present application provides an insulated gate bipolar transistor (IGBT) device with narrow mesa and a manufacture thereof. The device comprises: a semiconductor substrate; gate trench structures and emitter trench structures formed on front surface of the semiconductor substrate and alternately arranged along with horizontal direction; wherein the gate trench structures and the emitter trench structures are respectively set in pair along with the arrangement direction, and the pairs of the gate trench structures and the pairs of the emitter trench structures are set in alternate arrangement along with the arrangement direction; well regions formed between the emitter trench structures of one pair; emitter injection regions formed between the gate trench structures of one pair and between the emitter trench structures of one pair, respectively; and wherein, in the region between the emitter trench structures of the one pair, the emitter injection region is above the well region.Type: ApplicationFiled: June 15, 2021Publication date: December 16, 2021Applicant: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa CHI, Ching-Ju LIN, Ying-Tsung WU, Conghui LIU, Longkang YANG, Huan WANG, Richard Ru-Gin CHANG
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Publication number: 20210391416Abstract: The present invention provides a power device with super junction structure (or referred to as super junction power device) and a method of making the same. When making a super junction power device, impurity of a second conductive type may be implanted into an epitaxial layer of a first conductive type to form a floating island of the second conductive type and a pillar of the second conductive type successively through a super junction mask (or reticle) after forming the epitaxial layer of the first conductive type, directly through a well mask (or reticle) before or after forming a well region of the second conductive type, and directly through a contact mask (or reticle) before or after forming a contact structure. Multiple epitaxial processes and deep trench etching process may not be needed. Therefore, the process is simple, the cost is low and yield and reliability are high.Type: ApplicationFiled: June 11, 2021Publication date: December 16, 2021Applicant: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa CHI, Conghui LIU, Huan WANG, Longkang YANG
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Patent number: 10707290Abstract: Provided are a flexible display panel and a flexible display device, in which a non-display area surrounds a display area. A concave area protrudes along a direction away from interior of display area. A convex area has a folding axis parallel to a first edge. The non-display area includes a fan-out area, in which lead wires are provided. Each lead wire has a first end and a second end. There are signal traces each extending along a first direction provided in display area. The signal traces are electrically connected to first ends of lead wires. The convex area and concave area are arranged along a second direction. The second direction intersects first direction. A driving chip is included, which is a ball grid array package driving chip and is arranged in concave area where lead wires are away from first edge and electrically connected to second ends of lead wires.Type: GrantFiled: November 15, 2018Date of Patent: July 7, 2020Assignee: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD.Inventors: Quanpeng Yu, Wenxin Jiang, Chuanli Leng, Zhenying Li, Xilie Li, Zhe Li, Conghui Liu
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Publication number: 20200073496Abstract: An organic light-emitting display panel and fabrication method thereof are provided. The organic light-emitting display panel includes an organic light-emitting element array substrate, a thin film encapsulation layer covering the organic light-emitting element array substrate, and touch-control electrodes. The thin film encapsulation layer includes at least one inorganic layer and at least one organic layer. First groove structures are configured in at least one organic layer, and sidewalls of the first groove structures are arc-shaped. The touch-control electrodes are disposed in the first groove structures.Type: ApplicationFiled: November 8, 2019Publication date: March 5, 2020Inventors: Yu CAI, Xuening LIU, Heeyol LEE, Quanpeng YU, Conghui LIU
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Patent number: 10503327Abstract: An organic light-emitting display panel and fabrication method thereof are provided. The organic light-emitting display panel includes an organic light-emitting element array substrate, a thin film encapsulation layer covering the organic light-emitting element array substrate, and touch-control electrodes. The thin film encapsulation layer includes at least one inorganic layer and at least one organic layer. First groove structures are configured in at least one organic layer, and sidewalls of the first groove structures are arc-shaped. The touch-control electrodes are disposed in the first groove structures.Type: GrantFiled: January 9, 2017Date of Patent: December 10, 2019Assignees: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD., TIANMA MICRO-ELECTRONICS CO., LTD.Inventors: Yu Cai, Xuening Liu, Heeyol Lee, Quanpeng Yu, Conghui Liu