Abstract: The present disclosure includes a shift register unit circuit, including input storing module, configured to receive an input signal at an input terminal and store the input signal; storage retrieving module, configured to retrieve the input signal from the input storing module under influence of at least a first clock signal; output driving module, configured to transfer the input signal to an first output terminal under control of the storage retrieving module; and pulling-down and maintaining module, configured to pull down a voltage at the output terminal to low voltage level after output operation is completed, and maintain the voltage at low voltage level until the output driving module receives a next input signal. The present disclosure also includes a gate driver circuit including such shift register units and a method for generating gate driving signal.

Abstract: A gate driving unit and a gate driving method are provided. The gate driving unit includes an input unit, a driving unit, a pull-down unit, and a pull-down control unit. The pull-down unit has an output terminal of a current stage cascaded signal and an output terminal; in the pull-up phase, the output terminal of the current stage cascaded signal and the output terminal output signal, a voltage of the output terminal of the current stage cascaded signal is pulled down to a first reference low electric level, and a voltage of the output terminal is pulled down to a second reference low electric level.

Abstract: The present disclosure includes a shift register unit circuit, including input storing module, configured to receive an input signal at an input terminal and store the input signal; storage retrieving module, configured to retrieve the input signal from the input storing module under influence of at least a first clock signal; output driving module, configured to transfer the input signal to an first output terminal under control of the storage retrieving module; and pulling-down and maintaining module, configured to pull down a voltage at the output terminal to low voltage level after output operation is completed, and maintain the voltage at low voltage level until the output driving module receives a next input signal. The present disclosure also includes a gate driver circuit including such shift register units and a method for generating gate driving signal.

Abstract: A gate driving unit and a gate driving method are provided. The gate driving unit includes an input unit, a driving unit, a pull-down unit, and a pull-down control unit. The pull-down unit has an output terminal of a current stage cascaded signal and an output terminal; in the pull-up phase, the output terminal of the current stage cascaded signal and the output terminal output signal, a voltage of the output terminal of the current stage cascaded signal is pulled down to a first reference low electric level, and a voltage of the output terminal is pulled down to a second reference low electric level.

Abstract: A GOA drive circuit includes a multiple stage of GOA drive units. A GOA drive unit includes a pre-pulldown unit which is configured to disconnect a discharge path of a first voltage signal via the pull-down sustaining unit before the first voltage signal jumps from a low electric potential to a high electric potential. In the GOA drive circuit, the voltage stability of the key nodes in a circuit and the reliability of the timing can be ensured; overall performance of the GOA drive circuit can be improved; and a service life of a display device can be prolonged.

Abstract: A GOA drive circuit includes a multiple stage of GOA drive units. A GOA drive unit includes a pre-pulldown unit which is configured to disconnect a discharge path of a first voltage signal via the pull-down sustaining unit before the first voltage signal jumps from a low electric potential to a high electric potential. In the GOA drive circuit, the voltage stability of the key nodes in a circuit and the reliability of the timing can be ensured; overall performance of the GOA drive circuit can be improved; and a service life of a display device can be prolonged.

Abstract: An organic light emitting diode panel, a gate driver circuit and a gate driver circuit unit are disclosed, where the gate driver circuit includes a scanning signal generating unit for generating a scanning signal, transmitting a first clock signal to a scanning signal output terminal under the control of a pulse signal, and pulling down and maintaining the voltage of the scanning signal output terminal at a low voltage level under the control of a second clock signal. The gate driver circuit unit also includes a light emitting signal generating unit for generating a light emitting signal, pulling down the voltage of the light emitting signal output terminal under the control of the pulse signal, and charging the light emitting signal output terminal under the control of the second clock signal.

Abstract: The present application provides a gate driver circuit comprising at least one cascaded gate driver circuit unit. The low-level-holding enabling terminal of the gate driver circuit unit is connected to an adaptive voltage generating module. The adaptive voltage generating module generates a self-compensating voltage according to its constant current source and transmits to the low-level-holding enabling terminal, so as to provide an effective voltage level to the low-level-holding enabling terminal. Because the threshold voltage shift caused by pulling-down transistors in the low-level-holding module is embodied at the low-level-holding enabling terminal, the adaptive voltage generating module generates a self-compensating voltage with its constant current source according to the threshold voltage to compensate the increase of the threshold voltage.

Abstract: The present disclosure provides a scan driving circuit for driving an Nth-stage scanning line including: a pull-up control module for receiving a cascade signal of an upper stage and generating a scan level signal of the Nth-stage scanning line based on the cascade signal of the upper stage; a pull-up module for pulling down the scanning signal of the Nth-stage scanning line when the first clock signal is low according to the scan level signal and the first clock signal; the pull-up control module includes a first control unit and a second control unit, the control terminal of the second control unit inputs a second clock signal for controlling the scan level signal to become smaller when the second clock signal is at a high level. The present disclosure can prevent the waveform of the gate from appearing spikes, and thus the waveform of the gate is output normally.

Abstract: The present application discloses a shift register and units thereof, wherein low voltage level maintaining module (30) includes: a first maintaining unit (31) and a second maintaining unit (32), configured to maintain a signal output terminal and/or the controlling terminal (Q) of the driving module (20) at low voltage level when an effective level is received. A threshold voltage sensing module (40) is coupled between the first maintaining unit (31) and the second maintaining unit (32), the threshold voltage sensing module (40) is configured to control its signal output terminal to provide an effective level to the second maintain-enabling terminal (P2) according to threshold voltage shift of the first maintaining unit (31) sensed. Therefore, low voltage maintaining module (30) may endure a greater threshold voltage shift, and the life span of the circuit is extended. The present application further discloses a display device and a voltage regulating circuit.

Abstract: A controllable voltage source, comprising a control module (1), a storage module (2) and an output module (3); the control module (1) is coupled between a high level end and a low level end; the storage module (2) comprises a storage capacitor; two ends of the storage capacitor are respectively coupled to the control module (1) to form a first terminal and a second terminal; the output module (3) is coupled to the second terminal, and the signal output end thereof is used to output to an external circuit the voltage signal of the controllable voltage source; the control module (1) responds the effective level of a first clock signal so as to enable the first terminal to be coupled to the high level end, and the first terminal is charged from the high level end; the control module (1) responds the effective level of a second clock signal so as to enable the second terminal to be coupled to the high level end, and the second terminal is charged from the high level end; and the first terminal is coupled to the l

Abstract: An organic light emitting diode panel, a gate driver circuit and a gate driver circuit unit are disclosed, where the gate driver circuit includes a scanning signal generating unit for generating a scanning signal, transmitting a first clock signal to a scanning signal output terminal under the control of a pulse signal, and pulling down and maintaining the voltage of the scanning signal output terminal at a low voltage level under the control of a second clock signal. The gate driver circuit unit also includes a light emitting signal generating unit for generating a light emitting signal, pulling down the voltage of the light emitting signal output terminal under the control of the pulse signal, and charging the light emitting signal output terminal under the control of the second clock signal.

Abstract: A shift register is disclosed. The shift register comprises a multistage shift register units. Each of the stage shift register unit comprises: a driving module, charging to the driving signal via the first clock signal based on the driving control signal; an input module, outputting the driving control signal based on the second clock signal and the first control signal; a low level maintenance module, keeping the potential of the driving signal at the low level potential of the second reference. The shift register can avoid the leakage from the first output end, decrease the raising time of the driving signal and occupy the small area.

Abstract: A photoelectric sensor and a display panel comprise: a pulse transmission unit comprising a control node, after obtaining a driving voltage, the control node of the pulse transmission unit transmitting first clock signals to a signal output terminal; a pulse control unit configured to receive scanning signals from a signal input terminal and charging the control node of the pulse transmission unit so as to provide the driving voltage; and photoelectric sensing unit configured to provide a leakage current in response to the intensity of external illumination when receiving the external illumination, the leakage current discharging the control node of the pulse transmission unit, so that the voltage at the control node of the pulse transmission unit is less than the driving voltage after a period of time.

Abstract: The present disclosure provides a scan driving circuit for driving an Nth-stage scanning line including: a pull-up control module for receiving a cascade signal of an upper stage and generating a scan level signal of the Nth-stage scanning line based on the cascade signal of the upper stage; a pull-up module for pulling down the scanning signal of the Nth-stage scanning line when the first clock signal is low according to the scan level signal and the first clock signal; the pull-up control module includes a first control unit and a second control unit, the control terminal of the second control unit inputs a second clock signal for controlling the scan level signal to become smaller when the second clock signal is at a high level. The present disclosure can prevent the waveform of the gate from appearing spikes, and thus the waveform of the gate is output normally.

Abstract: An ultraviolet light sensing circuit and sensing system. The ultraviolet light sensing circuit comprises a modulation unit and a phase delay unit, wherein the modulation unit comprises a first stage of inverter which is used for sensing ultraviolet light and is used as a voltage feedback modulation stage; and the phase delay unit comprises N stages of inverters which are connected in sequence, where N is an even number which is greater than or equal to 2. The modulation unit is connected to the phase delay unit in sequence, and the output voltage of the phase delay unit is fed to the modulation unit; and the modulation unit is modulated by a control signal which is a pulse signal. The ultraviolet light sensing circuit and sensing system can be used for ultraviolet light information communications. The ultraviolet light sensing circuit can sense ultraviolet light signals and output amplitude modulation wave signals.

Abstract: The present application discloses a shift register and units thereof, wherein low voltage level maintaining module (30) includes: a first maintaining unit (31) and a second maintaining unit (32), configured to maintain a signal output terminal and/or the controlling terminal (Q) of the driving module (20) at low voltage level when an effective level is received. A threshold voltage sensing module (40) is coupled between the first maintaining unit (31) and the second maintaining unit (32), the threshold voltage sensing module (40) is configured to control its signal output terminal to provide an effective level to the second maintain-enabling terminal (P2) according to threshold voltage shift of the first maintaining unit (31) sensed. Therefore, low voltage maintaining module (30) may endure a greater threshold voltage shift, and the life span of the circuit is extended. The present application further discloses a display device and a voltage regulating circuit.

Abstract: A photoelectric sensor and a display panel comprise: a pulse transmission unit comprising a control node, after obtaining a driving voltage, the control node of the pulse transmission unit transmitting first clock signals to a signal output terminal; a pulse control unit configured to receive scanning signals from a signal input terminal and charging the control node of the pulse transmission unit so as to provide the driving voltage; and photoelectric sensing unit configured to provide a leakage current in response to the intensity of external illumination when receiving the external illumination, the leakage current discharging the control node of the pulse transmission unit, so that the voltage at the control node of the pulse transmission unit is less than the driving voltage after a period of time.

Abstract: A gate driving circuit and a display device are disclosed. The gate driving circuit includes a control module for pulling down the level of the second control node to be at the low level before the gate strobe signals are outputted and during the output period of the gate cutoff signals. In this way, the second pull-down control end of the low level maintaining module is pulled down to be at the low levels, and the low level maintaining module is in the off state. In this way, the electrical leakage of the low level maintaining module may be reduced so as to decrease the output delay of the gate signals and to enhance the efficiency of the circuit.

Abstract: The present application provides a gate driver circuit comprising at least one cascaded gate driver circuit unit. The low-level-holding enabling terminal of the gate driver circuit unit is connected to an adaptive voltage generating module. The adaptive voltage generating module generates a self-compensating voltage according to its constant current source and transmits to the low-level-holding enabling terminal, so as to provide an effective voltage level to the low-level-holding enabling terminal. Because the threshold voltage shift caused by pulling-down transistors in the low-level-holding module is embodied at the low-level-holding enabling terminal, the adaptive voltage generating module generates a self-compensating voltage with its constant current source according to the threshold voltage to compensate the increase of the threshold voltage.