Patents by Inventor Connie Astrachan

Connie Astrachan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for generating integrated circuit test patterns
    Patent number: 5745501
    Abstract: A method and apparatus for generating integrated circuit test patterns (218) to test a functionality of integrated circuits. Module test stimuli (202) for each module present in an integrated circuit (10) are generated and retained (102). The module test stimuli (202) are translated to module drive patterns (206). Module expected patterns (210) are determined based on the module drive patterns (206) or module test stimuli (202) using module models (208). Integrated circuit data (216) describing the structure and timing of the integrated circuit (10) is used to translate the module patterns (212) into integrated circuit test patterns (218). The integrated circuit test patterns (212) are validated (220), transformed to test vectors (226), and the test vectors (226) are applied to the external connections of the integrated circuit (10) to test a functionality of the integrated circuit (10). A data processing system (300) creates the integrated circuit test patterns (218).
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: April 28, 1998
    Assignee: Motorola, Inc.
    Inventors: Robert E. Garner, Connie Astrachan, Edward J. Hathaway