Patents by Inventor Conor Brogan

Conor Brogan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070111356
    Abstract: A photodetector includes a semiconductor substrate having first and second main surfaces opposite to each other. The photodetector includes at least one trench formed in the first main surface and a first anode/cathode region having a first conductivity formed proximate the first main surface and sidewalls of the at least one trench. The photodetector includes a second anode/cathode region proximate the second main surface. The second anode/cathode region has a second conductivity opposite the first conductivity. The at least one trench extends to the second main surface of the semiconductor substrate.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 17, 2007
    Applicant: Icemos Technology Corporation
    Inventors: Robin Wilson, Conor Brogan, Hugh Griffin, Cormac MacNamara
  • Publication number: 20070085117
    Abstract: A photodetector array includes a semiconductor substrate having opposing first and second main surfaces, a first layer of a first doping concentration proximate the first main surface, and a second layer of a second doping concentration proximate the second main surface. The photodetector includes at least one conductive via formed in the first main surface and an anode/cathode region proximate the first main surface and the at least one conductive via. The via extends to the second main surface. The conductive via is isolated from the semiconductor substrate by a first dielectric material. The anode/cathode region is a second conductivity opposite to the first conductivity. The photodetector includes a doped isolation region of a third doping concentration formed in the first main surface and extending through the first layer of the semiconductor substrate to at least the second layer of the semiconductor substrate.
    Type: Application
    Filed: October 11, 2006
    Publication date: April 19, 2007
    Applicant: Icemos Technology Corporation
    Inventors: Robin Wilson, Conor Brogan, Hugh Griffin, Cormac MacNamara
  • Publication number: 20070077725
    Abstract: A positive-intrinsic-negative (PIN)/negative-intrinsic-positive (NIP) diode includes a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate is of a first conductivity. The PIN/NIP diode includes at least one trench formed in the first main surface which defines at least one mesa. The trench extends to a first depth position in the semiconductor substrate. The PIN/NIP diode includes a first anode/cathode layer proximate the first main surface and the sidewalls and the bottom of the trench. The first anode/cathode layer is of a second conductivity opposite to the first conductivity. The PIN/NIP diode includes a second anode/cathode layer proximate the second main surface, a first passivation material lining the trench and a second passivation material lining the mesa. The second anode/cathode layer is the first conductivity.
    Type: Application
    Filed: August 10, 2006
    Publication date: April 5, 2007
    Applicant: ICEMOS TECHNOLOGY CORPORATION
    Inventors: Robin Wilson, Conor Brogan, Hugh Griffin, Cormac MacNamara
  • Publication number: 20070063217
    Abstract: A bonded-wafer semiconductor device includes a semiconductor substrate, a buried oxide layer disposed on a first main surface of the semiconductor substrate and a multi-layer device stack. The multi-layer device stack includes a first device layer of a first conductivity disposed on the buried oxide layer, a second device layer of a second conductivity disposed on the first device layer, a third device layer of the first conductivity disposed on the second device layer and a fourth device layer of the second conductivity disposed on the third device layer. A trench is formed in the multi-layer device stack. A mesa is defined by the trench. The mesa has first and second sidewalls. A first anode/cathode layer is disposed on a first sidewall of the multi-layer device stack, and a second anode/cathode layer is disposed on the second sidewall of the multi-layer device stack.
    Type: Application
    Filed: August 22, 2006
    Publication date: March 22, 2007
    Applicant: ICEMOS TECHNOLOGY CORPORATION
    Inventors: Conor Brogan, Cormac MacNamara, Hugh Griffin, Robin Wilson
  • Publication number: 20060275946
    Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other. A trench is formed in the semiconductor substrate at the first main surface. The trench extends to a first depth position in the semiconductor substrate. The trench is lined with the dielectric material. The trench is filled with a conductive material. An electrical component is electrically connected to the conductive material exposed at the first main surface. A cap is mounted to the first main surface. The cap encloses the electrical component and the electrical connection.
    Type: Application
    Filed: May 4, 2006
    Publication date: December 7, 2006
    Applicant: Icemos Technology Corporation
    Inventors: Cormac MacNamara, Conor Brogan, Hugh Griffin, Robin Wilson