Abstract: We have found that under certain prescribed conditions a co-implantation process can be effective in increasing the electrical activation of implanted dopant ions. In accordance with one aspect of our invention, a method of making a semiconductor device includes the steps of providing a single crystal semiconductor body, implanting vacancy-generating, ions into a preselected region of the body, implanting dopant ions into the preselected region, the dopant implant forming interstitial defects in the body, and annealing the body to electrically activate the dopant ions. Importantly, in our method the vacancy-generating implant introduces vacancy defects into the preselected region that are effective to annihilate the interstitial defects. In addition, process steps that amorphize the surface of the implanted region are avoided, and the dose of the vacancy-generating implant is made to be greater than that of the dopant implant.

Abstract: We have found that under certain prescribed conditions a co-implantation process can be effective in increasing the electrical activation of implanted dopant ions. In accordance with one aspect of our invention, a method of making a semiconductor device includes the steps of providing a single crystal semiconductor body, implanting vacancy-generating ions into a preselected region of the body, implanting dopant ions into the preselected region, the dopant implant forming interstitial defects in the body, and annealing the body to electrically activate the dopant ions. Importantly, in our method the vacancy-generating implant introduces vacancy defects into the preselected region that are effective to annihilate the interstitial defects. In addition, process steps that amorphize the surface of the implanted region are avoided, and the dose of the vacancy-generating implant is made to be greater than that of the dopant implant.

Abstract: A method of fabricating a semiconductor device having a gate dielectric layer. The method includes the step of ion implanting at least one of Zr, Hf, La, Y, Al, Ti and Ta into the gate dielectric layer at low implant energy level to increase the dielectric constant of the dielectric layer. Subsequently, the implanted gate dielectric layer is annealed.

Abstract: A semiconductor device having a carbon-containing region with an advantageous concentration profile is disclosed. The carbon is introduced into a region of the substrate and at a depth below the space-charge layer of the device and at a concentration such that the carbon atoms absorb point defects created in the substrate during device fabrication but do not adversely affect the leakage characteristics of the device.

Abstract: This invention is predicated on applicant's discovery that near the gate dielectric/semiconductor interface, surface roughness of a particular spectral range plays a disproportionately larger role in scattering electrons and impeding their transport. Moving electrons will not enter the nooks and crannies of roughness having wavelength shorter than about 100 .ANG. and therefore are not affected by them, and electrons are less affected by roughness having wavelengths longer than about 1000 .ANG.. Accordingly, it is desirable to reduce the surface roughness of gate dielectrics at the interface. This can be accomplished prior to dielectric formation by inspection of semiconductor wafers for surface roughness and rejection of those wafers with high surface roughness content in the range 100 .ANG. to 1000 .ANG.. Such inspection also provides a valuable criterion for selecting optimum semiconductor processing steps.

Abstract: Transient enhanced diffusion (TED) of dopants is reduced by bring the surface closer to the implant damage prior to the annealing process.