Abstract: A sensor circuit, having a startup phase and an operation phase, includes: a sensor configured to generate a sensor signal based on a measured property, wherein the sensor signal has a frequency spectrum defined by a first frequency and a second frequency that is greater than the first frequency; a signal processing circuit including an analog-to-digital converter (ADC) configured to convert the sensor signal into a digital sensor signal; and an offset diagnosis circuit. The offset diagnosis circuit includes: a low pass filter having a cutoff frequency less than the first frequency and configured to generate a filtered signal based on the digital sensor signal; an offset register configured to store a startup signal value of the filtered signal during the startup phase; and an offset comparator circuit configured to set a threshold range based on the startup signal value for use during the operation phase.

Abstract: In some implementations, a sensor may determine a delay latency value associated with an amount of time from completion of a set of sensor tasks to an actual time of reception of a trigger to selectively transmit or sample sensor data. The sensor may calculate a deviation of the delay latency value from a target delay latency. The sensor may transmit a data frame including an indication associated with the deviation of the delay latency value from the target delay latency.

Abstract: A sensor circuit, having a startup phase and an operation phase, includes: a sensor configured to generate a sensor signal based on a measured property, wherein the sensor signal has a frequency spectrum defined by a first frequency and a second frequency that is greater than the first frequency; a signal processing circuit including an analog-to-digital converter (ADC) configured to convert the sensor signal into a digital sensor signal; and an offset diagnosis circuit. The offset diagnosis circuit includes: a low pass filter having a cutoff frequency less than the first frequency and configured to generate a filtered signal based on the digital sensor signal; an offset register configured to store a startup signal value of the filtered signal during the startup phase; and an offset comparator circuit configured to set a threshold range based on the startup signal value for use during the operation phase.

Abstract: In some implementations, a sensor may determine a delay latency value associated with an amount of time from completion of a set of sensor tasks to an actual time of reception of a trigger to selectively transmit or sample sensor data. The sensor may calculate a deviation of the delay latency value from a target delay latency. The sensor may transmit a data frame including an indication associated with the deviation of the delay latency value from the target delay latency.

Abstract: In some implementations, a sensor may determine a delay latency value associated with an amount of time from completion of a set of sensor tasks to an actual time of reception of a trigger to selectively transmit or sample sensor data. The sensor may calculate a deviation of the delay latency value from a target delay latency. The sensor may transmit a data frame including an indication associated with the deviation of the delay latency value from the target delay latency.