Patents by Inventor Constantine GAVRILOV

Constantine GAVRILOV has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10664386
    Abstract: Remotely debugging a non-responsive operating system (OS) of a computer system. Central processing units (CPUs) in a computer system are bound to receive queues of a network adapter. Interrupts for a CPU is disabled, wherein the CPU is not available to process hardware interrupt requests queued in the bound receive queues. A debugging message including debugging commands is received by the network adapter, wherein the debugging message is stored in a first receive queue of the network adapter bound to a first CPU. If the first CPU is available, the debugging commands in the debugging message stored in the first of the one or more receive queues of the network adapter are identified by a debugger of the computer system. The identified debugging commands are executed by the CPU to debug the non-responsive OS of the computer system.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: May 26, 2020
    Assignee: International Business Machines Corporation
    Inventors: Gregory Etelson, Constantine Gavrilov, Alexander Snast
  • Publication number: 20200089527
    Abstract: Mechanisms are provided for implementing intelligent input/output (I/O) operation completion modes in a high-speed network. An application thread executing on a central processing unit in the data processing system, receives a first indication to enter a mode of operation. The application thread enters the mode of operation, arms an arm file descriptor, and processes further completions that enter the completion queue until a second indication is received indicating that the mode is to be exited. Responsive to receiving the second indication to exit the mode, the application thread exits the mode of operation and disarms the arm tile descriptor.
    Type: Application
    Filed: September 17, 2018
    Publication date: March 19, 2020
    Inventors: Constantine Gavrilov, Jonathan Amit, Leonid Chernin, Alex Snast
  • Patent number: 10592341
    Abstract: Methods, apparatus and computer program products implement embodiments of the present invention that enable a computer system comprising networked computers to self-heal from a boot failure of one of the computers. In some embodiments, upon detecting a first computer having a memory and a physical boot device failing to successfully load a boot image, a second computer defines a virtual boot device in communication with the first computer and the second computer and having a boot image for the first computer. Subsequent to defining the virtual boot device, the second computer can configure the first computer to boot from the virtual boot device.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: March 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alex Friedman, Constantine Gavrilov
  • Patent number: 10432470
    Abstract: In an approach for distributed management of a network, a processor discovers a network, wherein the network is comprised of a plurality of nodes and an at least one switch. A processor identifies a first port associated with the at least one node. A processor identifies a link between the first port and a second port within the network. A processor determines the at least one link is properly configured. A processor selects a first node of the plurality of nodes to be a master node, wherein the master node is configured to manage the network. A processor initializes a routing table, wherein the routing table contains locations of each node in the plurality of nodes and a location of the at least one switch. A processor adjusts by the first node, the routing table based on the change to the network.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Alex Friedman, Constantine Gavrilov
  • Patent number: 10397096
    Abstract: A mechanism is provided in a data processing system comprising at least one processor and at least one memory, the at least one memory comprising instructions that are executed by the at least one processor and configure the at least one processor to implement a path query cache. Responsive to receiving a path query from a process executing in the data processing system, the path query cache performs a lookup of the path query in the path query cache. The path query identifies a source port, a source address and a destination address. The path query cache stores a plurality of entries, each entry comprising a source port, a source address, a destination address, the source and destination global identifiers, and good/bad flag indicating whether a path associated with the entry is available or not. Responsive to the path query cache determining the path query matches a valid entry in the plurality of entries, the path query cache returns a result to the process.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: August 27, 2019
    Assignee: International Business Machines Corporation
    Inventors: Lior Chen, Constantine Gavrilov, Alexander Snast, Ari Zigler
  • Patent number: 10360205
    Abstract: In an approach for managing read-modify-write operations within a network. Aspects of an embodiment of the present invention include an approach for managing read-modify-write operations within a network, wherein the approach includes a processor for determining that a lock associated with a component of a network is set. A processor identifies a key associated with the lock. A processor determines that the key associated with the lock has not been altered since a previous time cycle. A processor responsive to determining that the key associated with the lock has not been altered, determines that a lock timeout has expired for the key, wherein the lock timeout specifies, at least, a period of time. A processor responsive to determining that the lock timeout has expired for the key, releases the lock.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: July 23, 2019
    Assignee: International Business Machines Corporation
    Inventors: Alex Friedman, Constantine Gavrilov
  • Publication number: 20190166006
    Abstract: Provided are a method, a system, and a computer program product in which a switchless network is maintained. A processor discovers a plurality of nodes in the switchless network by requesting and receiving port information and node information in association with an attribute that allows datagrams to be propagated among the plurality of nodes of the switchless network without being terminated at host channel adapters of the plurality of nodes.
    Type: Application
    Filed: January 24, 2019
    Publication date: May 30, 2019
    Inventors: Lior Chen, Gregory Etelson, Constantine Gavrilov
  • Publication number: 20190158400
    Abstract: A processor initiates an execution of a network driver in a first node comprising a master node of a plurality of nodes in a switchless network. The network driver configures the plurality of nodes and service level in the switchless network by transmitting management datagrams from the master node, wherein the management datagrams include an attribute that allows the management datagrams to be propagated among the plurality of nodes of the switchless network without being terminated at host channel adapters of the plurality of nodes.
    Type: Application
    Filed: January 28, 2019
    Publication date: May 23, 2019
    Inventors: Lior CHEN, Gregory ETELSON, Constantine GAVRILOV
  • Publication number: 20190158380
    Abstract: A plurality of nodes are maintained in a switchless network, wherein each of the plurality of nodes has at least one host channel adapter for communication. A management datagram that indicates source to destination routes for communication in the plurality of nodes is provided. An attribute is configured in the management datagram to allow the management datagram to be propagated among the plurality of nodes of the switchless network without being terminated at host channel adapters.
    Type: Application
    Filed: January 25, 2019
    Publication date: May 23, 2019
    Inventors: Lior Chen, Gregory Etelson, Constantine Gavrilov
  • Publication number: 20190138374
    Abstract: A computer program product, system, and method are provided for upgrading a kernel or kernel module with a configured persistent. A persistent memory space is configured in the memory to store application data from applications in user mode. A kernel executing in the memory is prevented from accessing the persistent memory space. A service is called to load an updated kernel in the memory to replace the kernel, wherein the applications have access to the persistent memory space after the updated kernel is loaded. The service may comprise a kernel execution mechanism that directly loads the updated kernel into the memory without a full reboot of the computer system. An extended memory kernel service may be loaded during a boot operation to reserve the persistent memory space as an extended memory space for use by the applications and prevent the kernel from accessing the persistent memory space.
    Type: Application
    Filed: January 3, 2019
    Publication date: May 9, 2019
    Inventors: Lior Chen, Alex Friedman, Constantine Gavrilov, Aharon Novogrodski, Alex Snast
  • Patent number: 10225185
    Abstract: A processor initiates an execution of a network driver in a first node comprising a master node of a plurality of nodes in a switchless network. The network driver configures the plurality of nodes and service level in the switchless network by transmitting management datagrams from the master node, wherein the management datagrams include an attribute that allows the management datagrams to be propagated among the plurality of nodes of the switchless network without being terminated at host channel adapters of the plurality of nodes.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: March 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Lior Chen, Gregory Etelson, Constantine Gavrilov
  • Patent number: 10225153
    Abstract: Provided are a method, a system, and a computer program product in which a switchless network is maintained. A processor discovers a plurality of nodes in the switchless network by requesting and receiving port information and node information in association with an attribute that allows datagrams to be propagated among the plurality of nodes of the switchless network without being terminated at host channel adapters of the plurality of nodes.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: March 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Lior Chen, Gregory Etelson, Constantine Gavrilov
  • Patent number: 10218601
    Abstract: A plurality of nodes are maintained in a switchless network, wherein each of the plurality of nodes has at least one host channel adapter for communication. A management datagram that indicates source to destination routes for communication in the plurality of nodes is provided. An attribute is configured in the management datagram to allow the management datagram to be propagated among the plurality of nodes of the switchless network without being terminated at host channel adapters.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: February 26, 2019
    Assignee: International Business Machines Corporation
    Inventors: Lior Chen, Gregory Etelson, Constantine Gavrilov
  • Patent number: 10193758
    Abstract: A connection management message that uses a proxy attribute is received, wherein the connection management message includes information on a first proxy queue pair and a second proxy queue pair, wherein the first proxy queue pair provides communication between a proxy node and an initiator node in a switchless network, and wherein the second proxy queue pair provides communication between the proxy node and a target node in the switchless network. The connection management message that uses the proxy attribute, channels datagrams received from the initiator node to the target node in the switchless network.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: January 29, 2019
    Assignee: International Business Machines Corporation
    Inventors: Lior Chen, Gregory Etelson, Constantine Gavrilov
  • Publication number: 20190018752
    Abstract: Remotely debugging a non-responsive operating system (OS) of a computer system. Central processing units (CPUs) in a computer system are bound to receive queues of a network adapter. Interrupts for a CPU is disabled, wherein the CPU is not available to process hardware interrupt requests queued in the bound receive queues. A debugging message including debugging commands is received by the network adapter, wherein the debugging message is stored in a first receive queue of the network adapter bound to a first CPU. If the first CPU is available, the debugging commands in the debugging message stored in the first of the one or more receive queues of the network adapter are identified by a debugger of the computer system. The identified debugging commands are executed by the CPU to debug the non-responsive OS of the computer system.
    Type: Application
    Filed: September 17, 2018
    Publication date: January 17, 2019
    Inventors: Gregory Etelson, Constantine Gavrilov, Alexander Snast
  • Patent number: 10176028
    Abstract: A computer program product, system, and method are provided for upgrading a kernel or kernel module with a configured persistent. A persistent memory memory space is configured in the memory to store application data from applications in user mode. A kernel executing in the memory is prevented from accessing the persistent memory space. A service is called to load an updated kernel in the memory to replace the kernel, wherein the applications have access to the persistent memory space after the updated kernel is loaded. The service may comprise a kernel execution mechanism that directly loads the updated kernel into the memory without a full reboot of the computer system. An extended memory kernel service may be loaded during a boot operation to reserve the persistent memory space as an extended memory space for use by the applications and prevent the kernel from accessing the persistent memory space.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: January 8, 2019
    Assignee: International Business Machines Corporation
    Inventors: Lior Chen, Alex Friedman, Constantine Gavrilov, Aharon Novogrodski, Alex Snast
  • Publication number: 20180314657
    Abstract: A mechanism is provided in a data processing system comprising at least one processor and at least one memory, the at least one memory comprising instructions that are executed by the at least one processor and configure the at least one processor to implement a device context device driver for forced detaching of an application from mapped devices. The device context device driver receives a command to detach an application, wherein the command specifies a process descriptor associated with the application. The device context device driver identifies a plurality of matching device context entries in a list of open device contexts maintained by the device context device driver that match the process descriptor. The device context device driver marks the plurality of matching device context entries as detached. The device context device driver invalidates mapped memory areas associated with the plurality of matching device context entries.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 1, 2018
    Inventors: Lior Chen, Constantine Gavrilov, Alexander Snast
  • Publication number: 20180316602
    Abstract: A mechanism is provided in a data processing system comprising at least one processor and at least one memory, the at least one memory comprising instructions that are executed by the at least one processor and configure the at least one processor to implement a path query cache. Responsive to receiving a path query from a process executing in the data processing system, the path query cache performs a lookup of the path query in the path query cache. The path query identifies a source port, a source address and a destination address. The path query cache stores a plurality of entries, each entry comprising a source port, a source address, a destination address, the source and destination global identifiers, and good/bad flag indicating whether a path associated with the entry is available or not. Responsive to the path query cache determining the path query matches a valid entry in the plurality of entries, the path query cache returns a result to the process.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 1, 2018
    Inventors: Lior Chen, Constantine Gavrilov, Alexander Snast, Ari Zigler
  • Publication number: 20180316760
    Abstract: A mechanism is provided in a data processing system comprising at least one processor and at least one memory, the at least one memory comprising instructions that are executed by the at least one processor and configure the at least one processor to implement a replication protocol for replicating memory from an initiator to a target. The initiator requests one or more pages of memory at the target. Responsive to the initiator receiving a page advertisement from the target, the initiator updates a list of pages at the initiator. The list of pages is replicated at the target. The initiator performs a remote direct memory access (RDMA) write to the one or more pages of memory at the target. Responsive to successful completion of the RDMA write, the initiator updates the list of pages at the initiator. Upon completion of the RDMA write the list of pages is updated at the target.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 1, 2018
    Inventors: Leonid Chernin, Daniel Gan-Levi, Ehood Garmiza, Constantine Gavrilov
  • Patent number: 10078576
    Abstract: Remotely debugging a non-responsive operating system (OS) of a computer system. Central processing units (CPUs) in a computer system are bound to receive queues of a network adapter. Interrupts for a CPU is disabled, wherein the CPU is not available to process hardware interrupt requests queued in the bound receive queues. A debugging message including debugging commands is received by the network adapter, wherein the debugging message is stored in a first receive queue of the network adapter bound to a first CPU. If the first CPU is available, the debugging commands in the debugging message stored in the first of the one or more receive queues of the network adapter are identified by a debugger of the computer system. The identified debugging commands are executed by the CPU to debug the non-responsive OS of the computer system.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: September 18, 2018
    Assignee: International Business Machines Corporation
    Inventors: Gregory Etelson, Constantine Gavrilov, Alexander Snast