Abstract: A system and method for high speed switching comprises receiving voltage inputs at a bridge rectifier, generating a control signal from a transistor, and driving a gate of a field effect transistor (FET) via the control signal of the transistor, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The system and method further comprises limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.

Abstract: A system and method for high speed switching comprises receiving voltage inputs at a bridge rectifier, generating a control signal from a transistor, and driving a gate of a field effect transistor (FET) via the control signal of the transistor, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The system and method further comprises limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.

Abstract: A method for high speed switching comprises receiving voltage inputs at a bridge rectifier, receiving a logic input signal at an optical isolator and generating an output signal from the optical isolator based on the logic input signal, and driving a gate of a field effect transistor (FET) via the output signal of the optical isolator, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The method further includes limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.

Abstract: A method for high speed switching comprises receiving voltage inputs at a bridge rectifier, receiving a logic input signal at an optical isolator and generating an output signal from the optical isolator based on the logic input signal, and driving a gate of a field effect transistor (FET) via the output signal of the optical isolator, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The method further includes limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.

Abstract: A switching circuit includes a bridge rectifier to receive voltage inputs and an optical isolator to receive a logic input signal and generate an output signal based on the logic input signal. The high speed switching circuit also includes a field effect transistor (FET) with a source connected to a negative output of the bridge rectifier, a drain connected to a positive output of the bridge rectifier through a load, and a gate driven by the output signal of the optical isolator. First and second resistors connect the voltage inputs to the gate of the FET through first and second diodes. The first and second resistors and the first and second diodes limit current flowing to the gate of the FET. A Zener diode connected to the gate of the FET limits voltage to the gate of the FET below a maximum voltage rating of the FET.

Abstract: A switching circuit includes a bridge rectifier to receive voltage inputs and an optical isolator to receive a logic input signal and generate an output signal based on the logic input signal. The high speed switching circuit also includes a field effect transistor (FET) with a source connected to a negative output of the bridge rectifier, a drain connected to a positive output of the bridge rectifier through a load, and a gate driven by the output signal of the optical isolator. First and second resistors connect the voltage inputs to the gate of the FET through first and second diodes. The first and second resistors and the first and second diodes limit current flowing to the gate of the FET. A Zener diode connected to the gate of the FET limits voltage to the gate of the FET below a maximum voltage rating of the FET.

Abstract: A switching circuit includes a bridge rectifier to receive voltage inputs across a load and an optical isolator to receive a logic input signal and generate an output signal based on the logic input signal. The high speed switching circuit also includes a field effect transistor (FET) with a source connected to a negative output of the bridge rectifier, a drain connected to a positive output of the bridge rectifier through a second load, and a gate driven by the output signal of the optical isolator. First and second resistors connect the voltage inputs to the gate of the FET through first and second diodes. The first and second resistors and the first and second diodes limit current flowing to the gate of the FET. A Zener diode connected to the gate of the FET limits voltage to the gate of the FET below a maximum voltage rating of the FET.

Abstract: A switching circuit includes a bridge rectifier to receive voltage inputs across a load and an optical isolator to receive a logic input signal and generate an output signal based on the logic input signal. The high speed switching circuit also includes a field effect transistor (FET) with a source connected to a negative output of the bridge rectifier, a drain connected to a positive output of the bridge rectifier through a second load, and a gate driven by the output signal of the optical isolator. First and second resistors connect the voltage inputs to the gate of the FET through first and second diodes. The first and second resistors and the first and second diodes limit current flowing to the gate of the FET. A Zener diode connected to the gate of the FET limits voltage to the gate of the FET below a maximum voltage rating of the FET.

Abstract: The invention discloses a high speed switching solid state relay circuit with a switching section, a current limiting section and a voltage limiting section. The switching section comprises a bridge rectifier receiving the load voltage inputs, a MOSFET with a source connected to the negative voltage of the load through the bridge rectifier, a drain connected to the load voltage output, and a gate. The switching section further includes an isolator circuit comprising an optically-coupled LED. The isolator circuit is configured to receive a logic input signal and generate an isolated output signal based on the logic input signal, and the gate of the MOSFET is driven by the isolated output signal. The current limiting section includes a first set of resistors connecting the voltage drop across the load to the gate of the MOSFET through diodes. The voltage limiting section comprises a Zener diode connected to the gate of the MOSFET.