Patents by Inventor Corene Casper
Corene Casper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130290385Abstract: Multiple file system events are detected on one or more nodes of a file system, each file system event corresponding to an operation that is to be performed on the file system. Each of the multiple system events are durably recorded as an entry for a journal of the file system prior to either performance or completion of the corresponding operation. A programmatic component that is external to the file system can process entries from the journal, and in response, the entries can be expired from the journal.Type: ApplicationFiled: April 30, 2012Publication date: October 31, 2013Inventors: Charles B. Morrey, III, Kimberly Keeton, Craig A. Soules, Alistair Veitch, Michael J. Spitzer, Corene Casper
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Patent number: 8312242Abstract: One embodiment is a method that uses a hierarchical bitmap tree in a storage system to store where available and unavailable memory space exists. Bitmap blocks are retrieved from the hierarchical bitmap tree to locate the available memory space.Type: GrantFiled: October 30, 2008Date of Patent: November 13, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Corene Casper, Terence M. Rokop, Samuel Revitch
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Publication number: 20100125583Abstract: One embodiment is a method that uses a hierarchical bitmap tree in a storage system to store where available and unavailable memory space exists. Bitmap blocks are retrieved from the hierarchical bitmap tree to locate the available memory space.Type: ApplicationFiled: October 30, 2008Publication date: May 20, 2010Inventors: Corene Casper, Terence M. Rokop, Samuel Revitch
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Patent number: 7496646Abstract: A storage area network is managed. In one embodiment, the method comprises providing a plurality of nodes; providing a plurality of storage, wherein the plurality of storage is shared by the plurality of nodes; determining if a change in the storage area network has occurred; and dynamically adjusting to the change if the change has occurred. In another embodiment, the system comprises a processor configured to communicate with a second node and at least one storage, wherein the storage is shared by the processor and the second node; the processor also being configured to determine if a change in the storage area network has occurred; and dynamically adjusting to the change if the change has occurred; and a memory coupled with the processor, the memory configured to provide instructions to the processor.Type: GrantFiled: September 20, 2002Date of Patent: February 24, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Corene Casper, Kenneth F. Dove
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Patent number: 7437386Abstract: A system and method are disclosed for providing multi-node environment comprising a first node associated with a first operating system; a second node associated with a second operating system, wherein the second operating system is independent of the first operating system; a storage; and an interconnect coupling the first node with the storage and coupling the second node with the storage; and wherein the first node directly accesses the storage and the second node directly accesses the storage.Type: GrantFiled: September 20, 2002Date of Patent: October 14, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Michael J. Callahan, Corene Casper, Kenneth F. Dove, Brent A. Kingsbury, Phil E. Krueger, Terence M. Rokop, Michael J. Spitzer
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Patent number: 6832338Abstract: An apparatus, method and computer program product for stopping processors in a multiprocessor system without using non-maskable interrupts are provided. With the apparatus, method and computer program product, at system initialization time, a copy of the operating system (OS) kernel is copied to a new physical location in memory. When a processor enters the debugger due to the occurrence of an event, the debugger switches its virtual-to-physical address mapping to point to the new copy of the OS kernel. The original copy of the OS kernel is then modified by inserting breakpoints, e.g., interrupts, in a repeating pattern in the text of the original copy of the OS kernel, with the exception of the breakpoint handler text in the original copy of the OS kernel. A cache flush of the remaining processors is then instigated thereby forcing the remaining processors to refetch instructions from the OS kernel.Type: GrantFiled: April 12, 2001Date of Patent: December 14, 2004Assignee: International Business Machines CorporationInventors: Corene Casper, Randal Craig Swanberg
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Publication number: 20030065760Abstract: A system and method for managing a storage area network is disclosed. In one embodiment, the method comprises providing a plurality of nodes; providing a plurality of storage, wherein the plurality of storage is shared by the plurality of nodes; determining if a change in the storage area network has occurred; and dynamically adjusting to the change if the change has occurred. In another embodiment, the system comprises a processor configured to communicate with a second node and at least one storage, wherein the storage is shared by the processor and the second node; the processor also being configured to determine if a change in the storage area network has occurred; and dynamically adjusting to the change if the change has occurred; and a memory coupled with the processor, the memory configured to provide instructions to the processor.Type: ApplicationFiled: September 20, 2002Publication date: April 3, 2003Applicant: PolyServe, IncInventors: Corene Casper, Kenneth F. Dove
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Publication number: 20030065686Abstract: A system and method are disclosed for providing multi-node environment comprising a first node associated with a first operating system; a second node associated with a second operating system, wherein the second operating system is independent of the first operating system; a storage; and an interconnect coupling the first node with the storage and coupling the second node with the storage; and wherein the first node directly accesses the storage and the second node directly accesses the storage.Type: ApplicationFiled: September 20, 2002Publication date: April 3, 2003Applicant: PolyServe, Inc.Inventors: Michael J. Callahan, Corene Casper, Kenneth F. Dove, Brent A. Kingsbury, Phil E. Krueger, Terence M. Rokop, Michael J. Spitzer
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Patent number: 6505286Abstract: A method for a user process to specify a policy for allocating pages of physical memory on the nodes of a multinode multiprocessor computer system. Through means such as a system call, an application program can specify to the operating system that physical pages of memory for an application-specified portion of virtual address space are to be physically allocated upon a specified set of nodes, subject to the additional selection criteria that the pages are to be allocated at first reference upon: 1) the node upon which the reference first occurs; 2) the node which has the most free memory, or 3) that the pages should be evenly distributed across the indicated set of nodes. In effect, the operating system remembers the specified allocation policy and node set from which the physical pages can be subsequently allocated as established by a system call. Subsequent use of the virtual address space for which the allocation policy is defined results in the memory being allocated accordingly.Type: GrantFiled: September 22, 2000Date of Patent: January 7, 2003Assignee: International Business Machines CorporationInventors: Brent A. Kingsbury, Corene Casper, Phillip E. Krueger, Paul E. McKenney
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Publication number: 20020152330Abstract: An apparatus, method and computer program product for stopping processors in a multiprocessor system without using non-maskable interrupts are provided. With the apparatus, method and computer program product, at system initialization time, a copy of the operating system (OS) kernel is copied to a new physical location in memory. When a processor enters the debugger due to the occurrence of an event, the debugger switches its virtual-to-physical address mapping to point to the new copy of the OS kernel. The original copy of the OS kernel is then modified by inserting breakpoints, e.g., interrupts, in a repeating pattern in the text of the original copy of the OS kernel, with the exception of the breakpoint handler text in the original copy of the OS kernel. A cache flush of the remaining processors is then instigated thereby forcing the remaining processors to refetch instructions from the OS kernel.Type: ApplicationFiled: April 12, 2001Publication date: October 17, 2002Applicant: International Business machines CorporationInventors: Corene Casper, Randal Craig Swanberg
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Patent number: 6247041Abstract: An apparatus and method is disclosed for allowing a user process to advise or control an operating system to place a process on a particular node or a node within a set of nodes. When a user process makes a system call to the operating system to either create, execute, move, or attach a process, a specified system resource is passed to the operating system with the system call. This advises the operating system to store the process on a node containing the system resource identified in the system call. The user process can also require the operating system to store a process on a particular node.Type: GrantFiled: August 29, 1997Date of Patent: June 12, 2001Assignee: International Business Machines CorporationInventors: Phillip Eric Krueger, Corene Casper, Kenneth Frank Dove, Brent Alan Kingsbury, Paul Edward McKenney
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Patent number: 6205528Abstract: A method for a user process to specify a policy for allocating pages of physical memory on the nodes of a multinode multiprocessor computer system. Through means such as a system call, an application program can specify to the operating system that physical pages of memory for an application-specified portion of virtual address space are to be physically allocated upon a specified set of nodes, subject to the additional selection criteria that the pages are to be allocated at first reference upon: 1) the node upon which the reference first occurs; 2) the node which has the most free memory, or 3) that the pages should be evenly distributed across the indicated set of nodes. In effect, the operating system remembers the specified allocation policy and node set from which the physical pages can be subsequently allocated, as established by a system call. Subsequent use of the virtual address space for which the allocation policy is defined results in the memory being allocated accordingly.Type: GrantFiled: August 29, 1997Date of Patent: March 20, 2001Assignee: International Business Machines CorporationInventors: Brent A. Kingsbury, Corene Casper, Phillip E. Krueger, Paul E. McKenney
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Patent number: 6049853Abstract: For a multiprocessor computer having shared memory distributed across multiple nodes, a method and system for dynamically replicating data such as program text stored in memory on a first node to memory on a second node for use by a process executing on the second node. In response to a page fault generated by the process in accessing data, a determination is made whether the data is present in the memory of another node. If so, memory is allocated on the process's node for the data, and the needed data is copied from the other node to the process's node. The process's page table entry for the missing data is then modified to contain the physical address of the allocated memory, where the data is now stored. The method is implemented in a preferred embodiment by using novel data structures linked to the data structures that are typically created when a file is mapped to a process's virtual address space.Type: GrantFiled: August 29, 1997Date of Patent: April 11, 2000Assignee: Sequent Computer Systems, Inc.Inventors: Brent A. Kingsbury, Corene Casper, Phillip E. Krueger