Patents by Inventor Corey A. Nevers

Corey A. Nevers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230352572
    Abstract: A transistor is disclosed having a substrate, a device layer disposed over the substrate, a gate electrode disposed over the device layer, and a drain electrode disposed over the substrate and spaced from the gate electrode. A first source electrode is disposed over the substrate opposite the drain electrode and spaced from the gate electrode. A second source electrode is disposed over the substrate spaced from the drain electrode opposite the gate electrode. A dielectric is disposed over the device layer, the gate electrode, and the drain electrode between the first source electrode and the second source electrode. A conductive interconnect couples the first source electrode and the second electrode and extends over the dielectric. The conductive interconnect comprises a shield wall that extends from the conductive interconnect into the dielectric between the gate electrode and the drain electrode with a distal end that is spaced above the device layer.
    Type: Application
    Filed: March 9, 2023
    Publication date: November 2, 2023
    Inventors: Subrata Halder, Corey A. Nevers
  • Patent number: 10720428
    Abstract: A high bandgap Schottky contact layer device and methods for producing same are provided herein. According to one aspect, a high bandgap Schottky contact layer device comprises a substrate, a first Schottky layer over the substrate, the first Schottky layer having a first bandgap, and a second Schottky layer over the first Schottky layer, the second Schottky layer having a second bandgap. The device further comprises a first metal contact over the second Schottky layer and at least one ohmic contact, a portion of which being in direct contact with the substrate. The first bandgap is greater than 1.7 electronvolts (eV). In one embodiment, the second bandgap is also greater than 1.7 eV.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: July 21, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Corey A. Nevers, Sheila K. Hurtt
  • Patent number: 9923088
    Abstract: The present disclosure relates to a semiconductor device with vertically integrated pseudomorphic high electron mobility transistors (pHEMTs). The disclosed semiconductor device includes a substrate, a lower pHEMT structure with a lower pHEMT, an isolation layer, and an upper pHEMT structure with an upper pHEMT. The lower pHEMT structure is formed over the substrate and has a first region and a second region that is laterally disposed with the first region. The lower pHEMT is formed in or on the second region. The isolation layer resides over the first region. The upper pHEMT structure is formed over the isolation layer and does not extend over the second region. Herein, the isolation layer separates the lower pHEMT structure from the upper pHEMT structure such that the lower pHEMT and the upper pHEMT operate independently from each other.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: March 20, 2018
    Assignee: Qorvo US, Inc.
    Inventors: Corey A. Nevers, Sheila K. Hurtt, Dana A. Schwartz
  • Publication number: 20180012986
    Abstract: The present disclosure relates to a semiconductor device with vertically integrated pseudomorphic high electron mobility transistors (pHEMTs). The disclosed semiconductor device includes a substrate, a lower pHEMT structure with a lower pHEMT, an isolation layer, and an upper pHEMT structure with an upper pHEMT. The lower pHEMT structure is formed over the substrate and has a first region and a second region that is laterally disposed with the first region. The lower pHEMT is formed in or on the second region. The isolation layer resides over the first region. The upper pHEMT structure is formed over the isolation layer and does not extend over the second region. Herein, the isolation layer separates the lower pHEMT structure from the upper pHEMT structure such that the lower pHEMT and the upper pHEMT operate independently from each other.
    Type: Application
    Filed: August 17, 2016
    Publication date: January 11, 2018
    Inventors: Corey A. Nevers, Sheila K. Hurtt, Dana A. Schwartz
  • Publication number: 20170133368
    Abstract: A high bandgap Schottky contact layer device and methods for producing same are provided herein. According to one aspect, a high bandgap Schottky contact layer device comprises a substrate, a first Schottky layer over the substrate, the first Schottky layer having a first bandgap, and a second Schottky layer over the first Schottky layer, the second Schottky layer having a second bandgap. The device further comprises a first metal contact over the second Schottky layer and at least one ohmic contact, a portion of which being in direct contact with the substrate. The first bandgap is greater than 1.7 electronvolts (eV). In one embodiment, the second bandgap is also greater than 1.7 eV.
    Type: Application
    Filed: September 27, 2016
    Publication date: May 11, 2017
    Inventors: Corey A. Nevers, Sheila K. Hurtt