Patents by Inventor Corey B. Olson
Corey B. Olson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210209045Abstract: Representative embodiments are disclosed for data transfer between field programmable gate arrays (FPGAs). A representative system includes: a PCIe communication network comprising a PCIe switch and a plurality of PCIe communication lines; a host computing system coupled to the PCIe communication network; a nonblocking crossbar switch; a plurality of memory circuits; and a plurality of field programmable gate arrays, each field programmable gate array configurable for a plurality of data transfers to and from the host computing system and any other field programmable gate array of the plurality of field programmable gate arrays, with each data transfer including a designation of a first memory address, a file size, and a stream number. Once base DMA registers have been initialized for a selected application, no further involvement by the host computing system is involved for the duration of the selected application.Type: ApplicationFiled: March 16, 2021Publication date: July 8, 2021Inventors: Gregory M. Edvenson, Corey B. Olson
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Publication number: 20210202036Abstract: A scalable FPGA-based solution to the short read mapping problem in DNA sequencing is disclosed which greatly accelerates the task of aligning short length reads to a known reference genome. A representative system comprises one or more memory circuits storing a plurality of short reads and a reference genome sequence; and one or more field programmable gate arrays configured to select a short read; to extract a plurality of seeds from the short read, each seed comprising a genetic subsequence of the short read; for each seed, to determine at least one candidate alignment location (CAL) in the reference genome sequence to form a plurality of CALs; for each CAL, to determine a likelihood of the short read matching the reference genome sequence in the vicinity of the CAL; and to select one or more CALs having the currently greater likelihood of the short read matching the reference genome sequence.Type: ApplicationFiled: March 16, 2021Publication date: July 1, 2021Inventor: Corey B. Olson
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Publication number: 20210200817Abstract: A system and method are disclosed for inexact search acceleration using reference data. A representative system includes one or more memory circuits storing a plurality of queries and a FM-index of the reference data; and one or more FPGAs configured to select a query; select a substring of the selected query; read a section of the FM-index and calculate a plurality of suffix array intervals for the sub string with a corresponding plurality of prepended characters in a first or next position; read a first or next character in the first or next position of the query and select a suffix array interval for the read first character; determine whether the suffix array interval is valid and whether a beginning of the query has been reached; returning a first search result when the suffix array interval is valid and the beginning of the query has been reached; and returning a second search result that no match of the query with the reference data was found when the suffix array interval is not valid.Type: ApplicationFiled: March 15, 2021Publication date: July 1, 2021Inventors: Paul T. Draghicescu, Gregory M. Edvenson, Corey B. Olson
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Patent number: 10991452Abstract: A scalable FPGA-based solution to the short read mapping problem in DNA sequencing is disclosed which greatly accelerates the task of aligning short length reads to a known reference genome. A representative system comprises one or more memory circuits storing a plurality of short reads and a reference genome sequence; and one or more field programmable gate arrays configured to select a short read; to extract a plurality of seeds from the short read, each seed comprising a genetic subsequence of the short read; for each seed, to determine at least one candidate alignment location (CAL) in the reference genome sequence to form a plurality of CALs; for each CAL, to determine a likelihood of the short read matching the reference genome sequence in the vicinity of the CAL; and to select one or more CALs having the currently greater likelihood of the short read matching the reference genome sequence.Type: GrantFiled: August 4, 2017Date of Patent: April 27, 2021Assignee: Micron Technology, Inc.Inventor: Corey B. Olson
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Patent number: 10983939Abstract: Representative embodiments are disclosed for data transfer between field programmable gate arrays (FPGAs). A representative system includes: a PCIe communication network comprising a PCIe switch and a plurality of PCIe communication lines; a host computing system coupled to the PCIe communication network; a nonblocking crossbar switch; a plurality of memory circuits; and a plurality of field programmable gate arrays, each field programmable gate array configurable for a plurality of data transfers to and from the host computing system and any other field programmable gate array of the plurality of field programmable gate arrays, with each data transfer including a designation of a first memory address, a file size, and a stream number. Once base DMA registers have been initialized for a selected application, no further involvement by the host computing system is involved for the duration of the selected application.Type: GrantFiled: August 4, 2017Date of Patent: April 20, 2021Assignee: Micron Technology, Inc.Inventors: Gregory M. Edvenson, Corey B. Olson
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Patent number: 10977314Abstract: A system and method are disclosed for inexact search acceleration using reference data. A representative system includes one or more memory circuits storing a plurality of queries and a FM-index of the reference data; and one or more FPGAs configured to select a query; select a substring of the selected query; read a section of the FM-index and calculate a plurality of suffix array intervals for the sub string with a corresponding plurality of prepended characters in a first or next position; read a first or next character in the first or next position of the query and select a suffix array interval for the read first character; determine whether the suffix array interval is valid and whether a beginning of the query has been reached; returning a first search result when the suffix array interval is valid and the beginning of the query has been reached; and returning a second search result that no match of the query with the reference data was found when the suffix array interval is not valid.Type: GrantFiled: August 7, 2017Date of Patent: April 13, 2021Assignee: Micron Technology, Inc.Inventors: Paul T. Draghicescu, Gregory M. Edvenson, Corey B. Olson
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Publication number: 20170357605Abstract: Representative embodiments are disclosed for data transfer between field programmable gate arrays (FPGAs). A representative system includes: a PCIe communication network comprising a PCIe switch and a plurality of PCIe communication lines; a host computing system coupled to the PCIe communication network; a nonblocking crossbar switch; a plurality of memory circuits; and a plurality of field programmable gate arrays, each field programmable gate array configurable for a plurality of data transfers to and from the host computing system and any other field programmable gate array of the plurality of field programmable gate arrays, with each data transfer including a designation of a first memory address, a file size, and a stream number. Once base DMA registers have been initialized for a selected application, no further involvement by the host computing system is involved for the duration of the selected application.Type: ApplicationFiled: August 4, 2017Publication date: December 14, 2017Inventors: Gregory M. Edvenson, Corey B. Olson
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Publication number: 20170351780Abstract: A system and method are disclosed for inexact search acceleration using reference data. A representative system includes one or more memory circuits storing a plurality of queries and a FM-index of the reference data; and one or more FPGAs configured to select a query; select a substring of the selected query; read a section of the FM-index and calculate a plurality of suffix array intervals for the sub string with a corresponding plurality of prepended characters in a first or next position; read a first or next character in the first or next position of the query and select a suffix array interval for the read first character; determine whether the suffix array interval is valid and whether a beginning of the query has been reached; returning a first search result when the suffix array interval is valid and the beginning of the query has been reached; and returning a second search result that no match of the query with the reference data was found when the suffix array interval is not valid.Type: ApplicationFiled: August 7, 2017Publication date: December 7, 2017Inventors: Paul T. Draghicescu, Gregory M. Edvenson, Corey B. Olson
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Publication number: 20170337325Abstract: A scalable FPGA-based solution to the short read mapping problem in DNA sequencing is disclosed which greatly accelerates the task of aligning short length reads to a known reference genome. A representative system comprises one or more memory circuits storing a plurality of short reads and a reference genome sequence; and one or more field programmable gate arrays configured to select a short read; to extract a plurality of seeds from the short read, each seed comprising a genetic subsequence of the short read; for each seed, to determine at least one candidate alignment location (CAL) in the reference genome sequence to form a plurality of CALs; for each CAL, to determine a likelihood of the short read matching the reference genome sequence in the vicinity of the CAL; and to select one or more CALs having the currently greater likelihood of the short read matching the reference genome sequence.Type: ApplicationFiled: August 4, 2017Publication date: November 23, 2017Inventor: Corey B. Olson
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Patent number: 9740798Abstract: A system and method are disclosed for inexact search acceleration using reference data. A representative system includes one or more memory circuits storing a plurality of queries and a FM-index of the reference data; and one or more FPGAs configured to select a query; select a substring of the selected query; read a section of the FM-index and calculate a plurality of suffix array intervals for the substring with a corresponding plurality of prepended characters in a first or next position; read a first or next character in the first or next position of the query and select a suffix array interval for the read first character; determine whether the suffix array interval is valid and whether a beginning of the query has been reached; returning a first search result when the suffix array interval is valid and the beginning of the query has been reached; and returning a second search result that no match of the query with the reference data was found when the suffix array interval is not valid.Type: GrantFiled: March 14, 2014Date of Patent: August 22, 2017Assignee: Micron Technology, Inc.Inventors: Paul T. Draghicescu, Gregory M. Edvenson, Corey B. Olson
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Patent number: 9734284Abstract: A scalable FPGA-based solution to the short read mapping problem in DNA sequencing is disclosed which greatly accelerates the task of aligning short length reads to a known reference genome. A representative system comprises one or more memory circuits storing a plurality of short reads and a reference genome sequence; and one or more field programmable gate arrays configured to select a short read; to extract a plurality of seeds from the short read, each seed comprising a genetic subsequence of the short read; for each seed, to determine at least one candidate alignment location (CAL) in the reference genome sequence to form a plurality of CALs; for each CAL, to determine a likelihood of the short read matching the reference genome sequence in the vicinity of the CAL; and to select one or more CALs having the currently greater likelihood of the short read matching the reference genome sequence.Type: GrantFiled: March 8, 2014Date of Patent: August 15, 2017Assignee: Micron Technology, Inc.Inventor: Corey B. Olson
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Patent number: 9727510Abstract: Representative embodiments are disclosed for data transfer between field programmable gate arrays (FPGAs). A representative system includes: a PCIe communication network comprising a PCIe switch and a plurality of PCIe communication lines; a host computing system coupled to the PCIe communication network; a nonblocking crossbar switch; a plurality of memory circuits; and a plurality of field programmable gate arrays, each field programmable gate array configurable for a plurality of data transfers to and from the host computing system and any other field programmable gate array of the plurality of field programmable gate arrays, with each data transfer including a designation of a first memory address, a file size, and a stream number. Once base DMA registers have been initialized for a selected application, no further involvement by the host computing system is involved for the duration of the selected application.Type: GrantFiled: January 29, 2015Date of Patent: August 8, 2017Assignee: Micron Technology, Inc.Inventors: Gregory M. Edvenson, Corey B. Olson
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Publication number: 20150169489Abstract: Representative embodiments are disclosed for data transfer between field programmable gate arrays (FPGAs). A representative system includes: a PCIe communication network comprising a PCIe switch and a plurality of PCIe communication lines; a host computing system coupled to the PCIe communication network; a nonblocking crossbar switch; a plurality of memory circuits; and a plurality of field programmable gate arrays, each field programmable gate array configurable for a plurality of data transfers to and from the host computing system and any other field programmable gate array of the plurality of field programmable gate arrays, with each data transfer including a designation of a first memory address, a file size, and a stream number. Once base DMA registers have been initialized for a selected application, no further involvement by the host computing system is involved for the duration of the selected application.Type: ApplicationFiled: January 29, 2015Publication date: June 18, 2015Inventors: Gregory M. Edvenson, Corey B. Olson
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Publication number: 20140297196Abstract: A scalable FPGA-based solution to the short read mapping problem in DNA sequencing is disclosed which greatly accelerates the task of aligning short length reads to a known reference genome. A representative system comprises one or more memory circuits storing a plurality of short reads and a reference genome sequence; and one or more field programmable gate arrays configured to select a short read; to extract a plurality of seeds from the short read, each seed comprising a genetic subsequence of the short read; for each seed, to determine at least one candidate alignment location (CAL) in the reference genome sequence to form a plurality of CALs; for each CAL, to determine a likelihood of the short read matching the reference genome sequence in the vicinity of the CAL; and to select one or more CALs having the currently greater likelihood of the short read matching the reference genome sequence.Type: ApplicationFiled: March 8, 2014Publication date: October 2, 2014Inventor: Corey B. Olson
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Publication number: 20140280344Abstract: A system and method are disclosed for inexact search acceleration using reference data. A representative system includes one or more memory circuits storing a plurality of queries and a FM-index of the reference data; and one or more FPGAs configured to select a query; select a substring of the selected query; read a section of the FM-index and calculate a plurality of suffix array intervals for the substring with a corresponding plurality of prepended characters in a first or next position; read a first or next character in the first or next position of the query and select a suffix array interval for the read first character; determine whether the suffix array interval is valid and whether a beginning of the query has been reached; returning a first search result when the suffix array interval is valid and the beginning of the query has been reached; and returning a second search result that no match of the query with the reference data was found when the suffix array interval is not valid.Type: ApplicationFiled: March 14, 2014Publication date: September 18, 2014Inventors: Paul T. Draghicescu, Gregory M. Edvenson, Corey B. Olson