Abstract: A method and apparatus are provided for compensating propagation delay in an electronic system relating to corresponding signals becoming skewed by variations in the dielectric materials over which the respective, corresponding signals travel. Compensation for the propagation delay is done by selecting printed circuit boards which each have one side comprised of a dielectric substrate material exhibiting a first dielectric constant and another side comprised of a dielectric substrate material exhibiting a second dielectric constant. By transmitting each of the corresponding signals across a side of a printed circuit board with a first dielectric constant and a side with a second dielectric constant, the signals are each delayed substantially the same by the effects of the dielectric constant, reducing the skew to zero. In specific application, the printed circuit boards are most easily matched by selecting printed circuit boards from a common printed circuit board panel or array.

Abstract: A memory module using a plurality of partially defective RDRAM devices in combination to simulate a single, fully operational RDRAM device. Multiple, partially defective RDRAM devices are configured to simulate a fully operational RDRAM device by taking advantage of the manner in which defective cells are localized on each RDRAM device.

Abstract: A memory module using a plurality of partially defective RDRAM devices in combination to simulate a single, fully operational RDRAM device. Multiple, partially defective RDRAM devices are configured to simulate a fully operational RDRAM device by taking advantage of the manner in which defective cells are localized on each RDRAM device.

Abstract: A memory module using a plurality of partially defective RDRAM devices in combination to simulate a single, fully operational RDRAM device. Multiple partially defective RDRAM devices are configured to simulate a fully operational RDRAM device by taking advantage of the manner in which defective cells are localized on each RDRAM device.

Abstract: A method and apparatus for compensating propagation delay in an electronic system relating to corresponding signals becoming skewed by variations in the dielectric materials over which the respective, corresponding signals travel. Compensation for the propagation delay is done by selecting printed circuit boards which each have one side comprised of a dielectric substrate material exhibiting a first dielectric constant and another side comprised of a dielectric substrate material exhibiting a second dielectric constant. By transmitting each of the corresponding signals across a side of a printed circuit board with a first dielectric constant and a side with a second dielectric constant, the signals are each delayed substantially the same by the effects of the dielectric constant, reducing the skew to zero. In specific application, the printed circuit boards are most easily matched by selecting printed circuit boards from a common printed circuit board panel or array.

Abstract: A method and apparatus for compensating propagation delay in an electronic system relating to corresponding signals becoming skewed by variations in the dielectric materials over which the respective, corresponding signals travel. Compensation for the propagation delay is done by selecting printed circuit boards which each have one side comprised of a dielectric substrate material exhibiting a first dielectric constant and another side comprised of a dielectric substrate material exhibiting a second dielectric constant. By transmitting each of the corresponding signals across a side of a printed circuit board with a first dielectric constant and a side with a second dielectric constant, the signals are each delayed substantially the same by the effects of the dielectric constant, reducing the skew to zero. In specific application, the printed circuit boards are most easily matched by selecting printed circuit boards from a common printed circuit board panel or array.

Abstract: A memory system comprising a memory controller, first and second memory arrays, and a decoder is provided. The memory arrays comprise at least one section having all good memory locations, and at least one section having at least one faulty memory location. The decoder is responsive to the memory controller for selectively enabling data transfer between the controller and the sections of the first and second memory arrays having all good memory locations.

Abstract: A memory system comprising a memory controller, first and second memory-arrays and a decoder is provided. The memory arrays comprise at least one section having all good memory locations, and at least one section having at least one faulty memory location. The decoder is responsive to the memory controller for selectively enabling data transfer between the controller and the sections of the first and second memory arrays having all good memory locations.