Patents by Inventor Corey Seastrand

Corey Seastrand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7478472
    Abstract: A method of making a circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: January 20, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, Voya Markovich, Corey Seastrand, David L. Thomas
  • Patent number: 7209368
    Abstract: A circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. An electrical assembly including the circuitized substrate as part thereof and a method of making the circuitized substrate are also included. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: April 24, 2007
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, Voya Markovich, Corey Seastrand, David L. Thomas
  • Publication number: 20060200977
    Abstract: A method of making a circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
    Type: Application
    Filed: May 9, 2006
    Publication date: September 14, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: John Lauffer, Voya Markovich, Corey Seastrand, David Thomas
  • Publication number: 20050195585
    Abstract: A circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. An electrical assembly including the circuitized substrate as part thereof and a method of making the circuitized substrate are also included. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
    Type: Application
    Filed: March 3, 2004
    Publication date: September 8, 2005
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: John Lauffer, Voya Markovich, Corey Seastrand, David Thomas
  • Patent number: 6721187
    Abstract: A multi-layer electronic structure includes an increased capacity for the attachment of active or passive devices thereto. This is achieved by creating a three-dimensional grid of connection points to electrically couple active or passive surface mounted devices to edge mounted devices. The grid pattern is useful with any laminate including circuit cards, ceramic modules and flexible circuits. The variety of electrical devices that may be connected to the cross-sectional substrate includes, but is not limited to, chips such as semiconductor chips, diodes, resistors, capacitors and printed wiring boards. The structure can be used to more rapidly pass data, such as optical data that is transmitted from a spectroscope through a VCSEL laser and the electronic structure to a computer for diagnostics and analysis. A stepped arrangement of circuitized laminates is described for this purpose.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: April 13, 2004
    Assignee: International Business Machines Corporation
    Inventors: Richard Ronald Hall, How Tzu Lin, Christopher John Majka, Norman Corey Seastrand, Matthew Francis Seward, Ronald Verne Smith
  • Publication number: 20020131252
    Abstract: A multi-layer electronic structure includes an increased capacity for the attachment of active or passive devices thereto. This is achieved by creating a three-dimensional grid of connection points to electrically couple active or passive surface mounted devices to edge mounted devices. The grid pattern is useful with any laminate including circuit cards, ceramic modules and flexible circuits. The variety of electrical devices that may be connected to the cross-sectional substrate includes, but is not limited to, chips such as semiconductor chips, diodes, resistors, capacitors and printed wiring boards. The structure can be used to more rapidly pass data, such as optical data that is transmitted from a spectroscope through a VCSEL laser and the electronic structure to a computer for diagnostics and analysis. A stepped arrangement of circuitized laminates is described for this purpose.
    Type: Application
    Filed: March 16, 2001
    Publication date: September 19, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Richard Ronald Hall, How Tzu Lin, Christopher John Majka, Norman Corey Seastrand, Matthew Francis Seward, Ronald Verne Smith