Abstract: A composite SOI semiconductor wafer (1) comprises a device layer (2) and a handle layer (3) with a buried oxide layer (4) located between the device and handle layers (2,3). The device and handle layers (2,3) are formed from device and handle wafers (9,10), respectively. A peripheral ridge (14) extending around a first major surface (12) of the device wafer (9) adjacent the peripheral edge (16) thereof is removed by etching a peripheral recess (25) to a depth (d) into the device wafer (9) prior to bonding the device and handle wafers (9,10), in order to avoid an unbonded peripheral pardon extending around the composite wafer (1). The depth to which the peripheral recess (25) is etched is greater then the final finished thickness t of the device layer (2). An oxide layer (22) is grown on the device water (9) and a photoresist layer (23) on the oxide layer (22) is patterned to define the peripheral recess (25).

Abstract: A composite SOI semiconductor wafer (1) comprises a device layer (2) and a handle layer (3) with a buried oxide layer (4) located between the device and handle layers (2,3). The device and handle layers (2,3) are formed from device and handle wafers (9,10), respectively. A peripheral ridge (14) extending around a first major surface (12) of the device wafer (9) adjacent the peripheral edge (16) thereof is removed by etching a peripheral recess (25) to a depth (d) into the device wafer (9) prior to bonding the device and handle wafers (9,10), in order to avoid an unbonded peripheral portion extending around the composite wafer (1). The depth d to which the peripheral recess (25) is etched is greater than the final finished thickness t of the device layer (2). An oxide layer (22) is grown on the device wafer (9) and a photoresist layer (23) on the oxide layer (22) is patterned to define the peripheral recess (25).