Patents by Inventor Cornel D. Stanescu

Cornel D. Stanescu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low dropout voltage regulator with non-miller frequency compensation
    Publication number: 20030102851
    Abstract: A low dropout voltage regulator with non-Miller frequency compensation is provided. The LDO circuit has two wide-band, low-power cascaded operational transconductance amplifiers (OTAs): an error amplifier and a unity-gain-configured voltage follower. The unity-gain-configured voltage follower drives a gate of a power PMOS path transistor with a high parasitic gate capacitance. The wide-band, low-power OTAs enable the use of a single, low-value, external compensation capacitor with a low equivalent series resistance (ESR). An on-chip-compensation capacitor is connected in parallel with the upper resistor of a feedback network, which introduces a zero-pole pair that enhances the phase margin close to unity-loop-gain frequency.
    Type: Application
    Filed: January 10, 2003
    Publication date: June 5, 2003
    Inventors: Cornel D. Stanescu, Radu H. Iacob
  • Low dropout voltage regulator with non-miller frequency compensation
    Patent number: 6518737
    Abstract: A low dropout voltage regulator with non-Miller frequency compensation is provided. The LDO circuit has two wide-band, low-power cascaded operational transconductance amplifiers (OTAs): an error amplifier and a unity-gain-configured voltage follower. The unity-gain-configured voltage follower drives a gate of a power PMOS path transistor with a high parasitic gate capacitance. The wide-band, low-power OTAs enable the use of a single, low-value load capacitor with a low equivalent series resistance (ESR). A frequency compensation capacitor is connected in parallel with the upper resistor of a feedback network, which introduces a zero-pole pair that enhances the phase margin close to unity-loop-gain frequency.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: February 11, 2003
    Assignee: Catalyst Semiconductor, Inc.
    Inventors: Cornel D. Stanescu, Radu H. Iacob