Patents by Inventor Cornelis Slob
Cornelis Slob has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9743521Abstract: A light-emitting module (3a-c; 23; 26; 33a-c) comprising a plurality of light-sources (12a-e; 27a-h) arranged in at least a first and a second column (18a-b; 28a-c) arranged side by side and extending along a first direction of extension (X1) of the light-emitting module (3a-c; 23; 26; 33a-c); and a plurality of connector terminal pairs (13a-b, 14a-b, 15a-b, 16a-b 17a-b), each being electrically connected to a corresponding one of the light-sources (3a-c; 23; 26; 33a-c) for enabling supply of electrical power thereto. Each connector terminal pair (13a-b, 14a-b, 15a-b, 16a-b 17a-b) comprises a first connector terminal (13a, 14a, 15a, 16a 17a) and a second connector terminal (13b, 14b, 15b, 16b 17b) being arranged at opposite sides of the light-emitting module (3a-c; 23; 26; 33a-c).Type: GrantFiled: September 10, 2010Date of Patent: August 22, 2017Assignee: PHILIPS LIGHTING HOLDING B.V.Inventors: Ralph Kurt, Cornelis Slob, Marc Andre De Samber, Michael Johan Ferdinand Marie Ter Laak, Gerard Kums, Egbert Lenderink, Marcellus Jacobus Johannes Van Der Lubbe, Mark Eduard Johan Sipkes
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Patent number: 8461542Abstract: The invention relates to a radiation detector and a method for its production, wherein a series of converter plates (110) and interconnect layers (120), which extend into a border volume (BV) lateral of the converter plates (110), are stacked. By filling voids in the border volume (BV) with an underfill material and cutting through the border volume, a contact surface (CS) is generated in which electrical leads (123) of the interconnect layers (120) lie free. To allow a good contacting, said leads (123) are preferably provided with enlargements in the contact surface, for example by bonding wires (132) to them.Type: GrantFiled: September 1, 2009Date of Patent: June 11, 2013Assignee: Koninklijke Philips Electronics N.V.Inventors: Rob Van Asselt, Cornelis Slob, Nicolaas Johannes Anthonius Van Veen, Christian Baeumer, Roger Steadman Booker, Christoph Herrmann, Johannes Wilhelmus Weekamp, Klaus Jurgen Engel
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Publication number: 20120170265Abstract: A light-emitting module (3a-c; 23; 26; 33a-c) comprising a plurality of light-sources (12a-e; 27a-h) arranged in at least a first and a second column (18a-b; 28a-c) arranged side by side and extending along a first direction of extension (X1) of the light-emitting module (3a-c; 23; 26; 33a-c); and a plurality of connector terminal pairs (13a-b, 14a-b, 15a-b, 16a-b 17a-b), each being electrically connected to a corresponding one of the light-sources (3a-c; 23; 26; 33a-c) for enabling supply of electrical power thereto. Each connector terminal pair (13a-b, 14a-b, 15a-b, 16a-b 17a-b) comprises a first connector terminal (13a, 14a, 15a, 16a 17a) and a second connector terminal (13b, 14b, 15b, 16b 17b) being arranged at opposite sides of the light-emitting module (3a-c; 23; 26; 33a-c).Type: ApplicationFiled: September 10, 2010Publication date: July 5, 2012Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Ralph Kurt, Cornelis Slob, Marc Andre De Samber, Michael Johan Ferdinand Marie Ter Laak, Gerard Kums, Egbert Lenderink, Marcellus Jacobus Johannes Van Der Lubbe, Mark Eduard Johan Sipkes
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Publication number: 20110204392Abstract: Disclosed herein is a method for producing an LED array grid including the steps of (i) arranging N electrically conducting parallel wires, where N is an integer >1, thus creating an array of wires having a width D perpendicular to a direction of the wires, (ii) arranging LED components to the array of wires such that each LED component is electrically coupled to at least two adjacent wires, (iii) stretching the array of wires such that the width D increases, and arranging the stretched LED array grid onto a plate or between two platesType: ApplicationFiled: May 5, 2011Publication date: August 25, 2011Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Johannes WEEKAMP, Cornelis SLOB
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Publication number: 20110168904Abstract: The invention relates to a radiation detector and a method for its production, wherein a series of converter plates (110) and interconnect layers (120), which extend into a border volume (BV) lateral of the converter plates (110), are stacked. By filling voids in the border volume (BV) with an underfill material and cutting through the border volume, a contact surface (CS) is generated in which electrical leads (123) of the interconnect layers (120) lie free. To allow a good contacting, said leads (123) are preferably provided with enlargements in the contact surface, for example by bonding wires (132) to them.Type: ApplicationFiled: September 1, 2009Publication date: July 14, 2011Applicant: KONNINKLIJK PHILIPS ELECTRONICS N.V.Inventors: Rob Van Asselt, Cornelis Slob, Nicolaas Johannes Anthonius Van Veen, Christian Baeumer, Roger Steadman Booker, Christoh Herrmann, Johannes Wilhelmus Weekamp, Klaus Jurgen Engel
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Patent number: 7942551Abstract: Disclosed herein is a method for producing an LED array grid including the steps of (i) arranging N electrically conducting parallel wires, where N is an integer>1, thus creating an array of wires having a width D perpendicular to a direction of the wires, (ii) arranging LED components to the array of wires such that each LED component is electrically coupled to at least two adjacent wires, (iii) stretching the array of wires such that the width D increases, and arranging the stretched LED array grid onto a plate or between two plates.Type: GrantFiled: April 19, 2007Date of Patent: May 17, 2011Assignee: Koninklijke Philips Electronics N.V.Inventors: Johannes W. Weekamp, Cornelis Slob
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Patent number: 7884289Abstract: The present invention relates to a method for manufacturing an electronic assembly (50) comprising an electronic component, a cavity and a substrate which method comprises; —providing an electronic component (10) having a first pattern with a substantially closed configuration; —providing a cover (18) on a surface of the electronic component, which cover together with said surface defines a cavity (20), the closed configuration of the first pattern substantially enclosing the cover at said surface; —providing a substrate (30) having a second pattern with a substantially closed configuration, which closed configuration at least partially corresponds to the closed configuration of the first pattern and comprises a solder pad; —disposing solder material at the solder pad; —positioning the electronic component and the substrate so as to align both the substantially closed configurations of the first and second pattern, while the substrate supports a top surface (28) of the cover; —reflow-soldering the solder mateType: GrantFiled: April 11, 2007Date of Patent: February 8, 2011Assignee: NXP B.V.Inventors: Johannes W. Weekamp, Cornelis Slob, Jacob M. Scheer, Freerk E. Van Straten
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Publication number: 20090159331Abstract: The present invention relates to a method for manufacturing an electronic assembly (50) comprising an electronic component, a cavity and a substrate which method comprises; —providing an electronic component (10) having a first pattern with a substantially closed configuration; —providing a cover (18) on a surface of the electronic component, which cover together with said surface defines a cavity (20), the closed configuration of the first pattern substantially enclosing the cover at said surface; —providing a substrate (30) having a second pattern with a substantially closed configuration, which closed configuration at least partially corresponds to the closed configuration of the first pattern and comprises a solder pad; —disposing solder material at the solder pad; —positioning the electronic component and the substrate so as to align both the substantially closed configurations of the first and second pattern, while the substrate supports a top surface (28) of the cover; —reflow-soldering the solder mateType: ApplicationFiled: April 11, 2007Publication date: June 25, 2009Applicant: NXP B.V.Inventors: Johannes W. Weekamp, Cornelis Slob, Jacob M. Scheer, Freerk E. Van Straten
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Publication number: 20090091932Abstract: Disclosed herein is a method for producing an LED array grid including the steps of (i) arranging N electrically conducting parallel wires, where N is an integer >1, thus creating an array of wires having a width D perpendicular to a direction of the wires, (ii) arranging LED components to the array of wires such that each LED component is electrically coupled to at least two adjacent wires, (iii) stretching the array of wires such that the width D increases, and arranging the stretched LED array grid onto a plate or between two platesType: ApplicationFiled: April 19, 2007Publication date: April 9, 2009Applicant: KONINKLIJKE PHILIPS ELECTRONICS N VInventors: Johannes Wilhelmus Weekamp, Cornelis Slob