Abstract: A phase-shifted sampling circuit is described. The phase-shifted sampling circuit includes a primary sampler circuit, an ADC circuit, and an equalization circuit. The primary sampler circuit includes an analog signal input, a first signal path, and a second signal path. The equalization circuit includes a primary sampler equalizer sub-circuit. The primary sampler equalizer sub-circuit is configured to compensate a mismatch between a transfer function associated with the first signal path and a transfer function associated with the second signal path. Further, a method of determining filter coefficients of an equalization circuit of a phase-shifted sampling circuit is described.

Abstract: A digital filter for processing at least one input signal is described. The digital filter includes at least two filter parts that are separately formed from each other. The at least two filter parts are configured to process the at least one input signal in parallel which is received by the digital filter. A first filter part of the at least two filter parts is implemented in a first chip. A second filter part of the at least two filter parts is implemented in a second chip. Further, a measurement instrument is described.

Abstract: A phase-shifted sampling module for sampling a signal is described. The phase-shifted sampling module includes a primary sampler module, an ADC module, and an equalization module. The primary sampler module includes an analog signal input, a first signal path, and a second signal path. The equalization module includes a primary sampler equalizer sub-module. The primary sampler equalizer sub-module is configured to compensate low-frequency mismatches between the first signal path and the second signal path. Further, a method for determining filter coefficients of an equalization module of a phase-shifted sampling module is described.

Abstract: A measurement instrument for acquiring an input signal is described. The measurement instrument includes a first acquisition path with a first acquisition circuit having a first sampling rate. The measurement instrument includes at least one second acquisition path with a second acquisition circuit, having a second sampling rate. The measurement instrument is configured to acquire the input signal with an overall sampling rate being higher than the first sampling rate and the second sampling rate. The first acquisition path and the at least one second acquisition path each have a decimation filter and a decimator connected in series to the decimation filter, thereby equalizing a low frequency band in the input signal when processing the input signal. Further, method of acquiring an input signal is described.

Abstract: A phase-shifted sampling module for sampling a signal is described. The phase-shifted sampling module includes a primary sampler module, an ADC module, and an equalization module. The primary sampler module includes an analog signal input, a first signal path, and a second signal path. The equalization module includes a primary sampler equalizer sub-module. The primary sampler equalizer sub-module is configured to compensate low-frequency mismatches between the first signal path and the second signal path. Further, a method for determining filter coefficients of an equalization module of a phase-shifted sampling module is described.

Abstract: A phase-shifted sampling circuit is described. The phase-shifted sampling circuit includes a primary sampler circuit, an ADC circuit, and an equalization circuit. The primary sampler circuit includes an analog signal input, a first signal path, and a second signal path. The equalization circuit includes a primary sampler equalizer sub-circuit. The primary sampler equalizer sub-circuit is configured to compensate a mismatch between a transfer function associated with the first signal path and a transfer function associated with the second signal path. Further, a method of determining filter coefficients of an equalization circuit of a phase-shifted sampling circuit is described.