Abstract: A heat sink component can include a body including a thermally conductive material that is electrically non-conductive. At least one first terminal can be formed over a first end of the body. At least one second terminal formed over a second end of the body. The second end of the body can be opposite the first end of the body in an X-direction. The heat sink component can have a length in the X-direction and a width in a Y-direction that is parallel with the top surface and perpendicular to the X-direction. A ratio of the width to the length can be greater than about 1.

Abstract: Multilayer capacitors are provided. For example, a multilayer capacitor may include first and second terminals adjacent first and second opposing end surfaces, respectively, and a plurality of active electrode layers, each active electrode layer including a first active electrode electrically connected with the first terminal and a second active electrode electrically connected with the second terminal. The first active electrode may be spaced apart from the second active electrode in a lengthwise direction to form an active electrode end gap. The multilayer capacitor also may include a plurality of floating electrode layers, including topmost and bottommost floating electrode layers. The plurality of active electrode layers may be an odd number such that a topmost active electrode layer is disposed between the topmost floating electrode layer and a top surface and a bottommost active electrode layer is disposed between the bottommost floating electrode layer and a bottom surface.

Abstract: A heat sink component can include a body including a thermally conductive material that is electrically non-conductive. The body can have a top surface, a bottom surface opposite the top surface, and a plurality of side surfaces. The heat sink component also can include a heat source terminal formed over the bottom surface of the body. The heat source terminal can be spaced apart from the plurality of side surfaces. The heat sink component further can include a heat sink terminal formed over the bottom surface of the body. The heat sink terminal can be spaced apart from the plurality of side surfaces.

Abstract: Multilayer components, assemblies, and methods for forming multilayer components and assemblies are provided. For example, a multilayer component includes a plurality of dielectric layers, including an outer dielectric layer, that are stacked in a Z-direction to form a substrate having a top and a bottom; a conductive layer formed over a respective one dielectric layer and disposed within the stacked plurality of dielectric layers such that the conductive layer is spaced apart from both the top and the bottom of the substrate along the Z-direction; a shield layer formed over the outer dielectric layer; and a plurality of vias extending from the shield layer. The plurality of vias can be electrically connected to a ground defined on a substrate of a device; the multilayer component can be mounted on a surface of the device or embedded within the device.

Abstract: A heat sink component can include a body including a thermally conductive material that is electrically non-conductive. At least one first terminal can be formed over a surface of the body. At least one second terminal can be formed over the surface of the body. A terminal spacing distance can be defined along the surface between the first terminal and the second terminal. A ratio of a length of the surface to the terminal spacing distance can be greater than about 10. Additionally or alternatively, a ratio of the area of the at least one body surface to the total terminal area can be less than 1.2. A component assembly can include a device having a plurality of terminals exposed on a top surface, and the heat source terminal and the heat sink terminal of the heat sink component can be connected with respective terminals of the device.

Abstract: The present disclosure provides multicomponent connector assemblies and methods of forming such assemblies. For example, a multicomponent connector assembly includes a multicomponent connector having first and support members and also includes a plurality of components disposed between the first and second support members. At least one of the plurality of components may be a heat sink component configured to conduct heat from a first area to a second area. Additionally, or alternatively, the plurality of components may include a capacitor, a resistor, a varistor, an inductor, or the like. In at least some connectors, a plurality of slots are defined, and at least one component is disposed between the first and support members in a respective one slot of the plurality of slots.

Abstract: A single layer capacitor can include a substrate having a first surface and a second surface opposite the first surface. A resistive layer can be formed over at least a portion of the first surface of the substrate. A first conductive layer can be formed over at least a portion of the resistive layer. A second conductive layer can be formed over at least a portion of the second surface of the substrate. As such, the single layer capacitor can include a resistor and a capacitor formed in series with one another.

Abstract: A surface mount component is disclosed including an electrically insulating beam that is thermally conductive. The electrically insulating beam has a first end and a second end that is opposite the first end. The surface mount component includes a thin-film component formed on the electrically insulating beam adjacent the first end of the electrically insulating beam. A heat sink terminal is formed on the electrically insulating beam adjacent a second end of the electrically insulating beam. In some embodiments, the thin-film component has an area power capacity of greater than about 0.17 W/mm2 at about 28 GHz.

Abstract: A capacitor assembly includes a primary capacitor and a secondary capacitor formed on a substrate. The primary capacitor and the secondary capacitor can be connected by a conduction line. The conduction line can be formed from a thin metal connection. The conduction line can be severed, i.e., trimmed, to finely tune a capacitance value of the capacitor assembly. The capacitor assembly can allow for tighter tolerance and wider variance of the capacitance value of the capacitor assembly. The capacitor assembly can be trimmed after installing the capacitor assembly in the circuit, thereby enabling fine tuning of the capacitance value of the capacitor assembly for applications requiring precision tunable capacitance.

Abstract: A surface mount component can include a monolithic substrate, an input terminal, an output terminal, and a DC bias terminal. Each terminal can be formed over the monolithic substrate. A conductive trace can be formed over a surface of the monolithic substrate included in a signal path between the input terminal and the output terminal. A thin-film resistor can be connected in a DC bias path between the DC bias terminal and the signal path. The DC bias path can have, at one or more locations along the DC bias path between the DC bias terminal and the signal path, a cross-sectional area in a plane that is perpendicular to the surface of the monolithic substrate. The cross-sectional area of the DC bias path can be less than about 1,000 square microns.

Abstract: A semiconductor-based capacitor can include a substrate including a semiconductor material, an oxide layer formed over the substrate, a conductive layer formed over at least a portion of the oxide layer, a plurality of distinct coplanar upper terminals, and a lower terminal. The upper terminals and the lower terminal can be exposed along the top and bottom surfaces of the substrate, respectively, for embedding the capacitor in a substrate such as a circuit board. The semiconductor-based capacitor can be sufficiently miniaturized to be embeddable within a circuit board while providing superior capacitance values without compromising the integrity of the capacitor. For example, each of the upper terminals can have a maximum width and a thickness normal to the maximum width, and a ratio of the width to the thickness can be greater than about 80:1 to prevent physical damage to the capacitor from warping or cracking.

Abstract: A combined metal-oxide-semiconductor (MOS) and metal-insulator-semiconductor (MIS) capacitor assembly is provided. The capacitor assembly includes a substrate comprising a semiconductor material; an oxide layer formed on a surface of the substrate; and an insulator layer formed over at least a portion of the oxide layer. The capacitor assembly further includes first and second conductive terminals, and a third terminal connected with the substrate. The oxide layer is connected in series between the substrate and the first conductive layer to form a first capacitor between the first terminal and the third terminal. The insulator layer is connected in series between the substrate and the second conductive layer to form a second capacitor between the second terminal and the third terminal.

Abstract: A surface mount component can include a monolithic substrate, an input terminal, an output terminal, and a DC bias terminal. Each terminal can be formed over the monolithic substrate. A conductive trace can be formed over a surface of the monolithic substrate included in a signal path between the input terminal and the output terminal. A thin-film resistor can be connected in a DC bias path between the DC bias terminal and the signal path. The DC bias path can have, at one or more locations along the DC bias path between the DC bias terminal and the signal path, a cross-sectional area in a plane that is perpendicular to the surface of the monolithic substrate. The cross-sectional area of the DC bias path can be less than about 1,000 square microns.

Abstract: The present invention is directed to a multilayer ceramic capacitor. The multilayer ceramic capacitor has a first end and a second end that is spaced apart from the first end in a longitudinal direction that is perpendicular to a lateral direction wherein the lateral direction and longitudinal direction are each perpendicular to a Z-direction. The multilayer ceramic capacitor comprises a monolithic body comprising a plurality of dielectric layers and a plurality of electrode layers parallel with the lateral direction.

Abstract: A surface mount transmission line capacitor can have excellent high frequency performance characteristics. The surface mount transmission line capacitor can include a monolithic substrate having a surface, a first electrode formed over the surface, a second electrode arranged over the first electrode, a dielectric layer arranged between the first electrode and second electrode, a first terminal layer exposed along the surface of the substrate and electrically connected with the first electrode, and a second terminal layer exposed along the surface of the substrate and electrically connected with the second electrode. The first terminal layer and the second terminal layer can be contained within a perimeter of the surface of the monolithic substrate.

Abstract: Multilayer electronic components and methods of forming multilayer electronic components are provided. For example, a multilayer electronic component includes a plurality of dielectric layers stacked in a Z-direction and comprising a dielectric material. The component also includes a first conductive layer overlying one of the plurality of dielectric layers and a second conductive layer overlying another of the plurality of dielectric layers and spaced apart from the first conductive layer in the Z-direction. The second conductive layer overlaps the first conductive layer in each of an X-direction and a Y-direction at an overlapping area to form a capacitor. The component further includes a via connected with one of the conductive layers at a location outside of the overlapping area. As another example, a via may connect with one conductive layer at a location opposite a non-conductive region formed in another conductive layer forming a capacitor with the one conductive layer.

Abstract: Multilayer structures and methods for forming multilayer structures and assemblies are provided. For example, a multilayer structure includes a plurality of dielectric layers stacked along a Z-direction; a first surface; a second surface opposite the first surface along the Z-direction; a via extending from the first surface to the second surface; a first conductive path defined on the first surface; and a second conductive path defined on the second surface. The via contacts both the first conductive path and the second conductive path to electrically connect the first conductive path to the second conductive path. The first conductive path, the second conductive path, and the via form an inductor.

Abstract: Inductors and methods for forming inductors and inductor assemblies are provided. For example, an inductor includes a core having a first surface and a second surface opposite the first surface; a plurality of vias extending from the first surface to the second surface; a first conductive path defined on the first surface; and a second conductive path defined on the second surface. At least one via of the plurality of vias contacts both the first and second conductive paths to electrically connect the first conductive path to the second conductive path.

Abstract: Filters, filter assemblies, and methods of forming filters are provided. For example, a filter includes a plurality of dielectric layers stacked in a Z-direction to form a substrate having a top and a bottom, and at least one conductive layer is formed over a dielectric layer. The conductive layer is positioned at a location along the Z-direction between the top and bottom of the substrate that is about 200 ?m or less from the bottom of the substrate. An assembly includes the filter attached to a device substrate. A method of forming the filter includes forming the dielectric layers and the at least one conductive layer, such as by forming the conductive layer over a dielectric layer, and stacking the plurality of layers to form a substrate with the conductive layer disposed about 200 ?m or less from a bottom of the substrate.

Abstract: Filters, filter assemblies, and methods of forming filters are provided. For example, a filter includes a plurality of dielectric layers that are stacked in a Z-direction to form a substrate having a top, a bottom, and a perimeter, with an outer dielectric layer disposed at the top. The filter also includes a plurality of conductive layers, with an outer conductive layer formed over the outer dielectric layer, and a plurality of vias that are defined along the perimeter of the substrate and extend from the outer conductive layer to the bottom of the substrate. An assembly includes the filter attached to a device substrate. A method of forming the filter includes forming the dielectric and conductive layers, such as by forming an outer conductive layer over an outer dielectric layer; stacking the plurality of layers to form a substrate; and defining a plurality of vias along the substrate's perimeter.