Abstract: Network devices, systems and methods are described that configure a network device user interface. One method includes receiving input to define user-selectable information from among a list of pre-arranged network information presented on a network device display. The method includes configuring the user-selectable information into a particular grouping and presenting the user-selectable information according to the particular grouping.

Abstract: Embodiments of the present invention relate to the filling of cache memory for cache memory initialization. In one embodiment, cache architecture dependent data is loaded into cacheable memory. The flow of initialization execution is transferred to the cache architecture dependent data in response to a trigger that indicates that an initialization of cache memory has been initiated. Each line contained in cache memory is filled using the cache architecture dependent data. The flow of initialization execution is returned back to the place in the initialization process from which it was transferred when the filling of cache memory is completed.

Abstract: A method of selective direct memory access (DMA) in a computer system having a network interface card (NIC), a processor subsystem, and a memory accessible to the subsystem, including the steps of the NIC receiving a plurality of packets from an external source; the NIC decoding a portion of each packet and determining whether the packet should be accepted by the computer system based on a predefined rule; and if the packet is accepted, selectively truncating the packet based on the predefined rule, and storing the truncated packet in the memory.

Abstract: A method of, shared register system and system for controlling access to a register are described. The shared register stores a plurality of bits including control and data bits. An access signal and a combined signal including a control portion and a data portion are received and the data portion of the combined signal is written to one or more data bits of the shared register corresponding to the control portion of the combined signal. A shared register system for controlling access to portions of a shared register includes a register having storage for bits and a register access control configured to receive an access signal and a combined signal. The register access control is operatively connected with the register to control write access to the register based on the access signal and the control portion of the combined signal.

Abstract: A method of selective direct memory access (DMA) in a computer system having a network interface card (NIC), a processor subsystem, and a memory accessible to the subsystem, including the steps of the NIC receiving a plurality of packets from an external source; the NIC decoding a portion of each packet and determining whether the packet should be accepted by the computer system based on a predefined rule; and if the packet is accepted, selectively truncating the packet based on the predefined rule, and storing the truncated packet in the memory.

Abstract: In one embodiment of the invention, a method for detecting a network loop problem in a network, includes: selecting a known static address of a selected device which should normally be detected at not more than one port of a downstream device; determining if the static address is detected in more than one port in a downstream device, wherein the current downstream device includes a first port which normally detects the known static address and a second port; if the static address is detected at the second port of the current downstream device, then determining the connection to the second port and if the connection to the second port is a leaf, then identifying the leaf as a misbehaving node, and if the connection to the second port is not a leaf, then evaluating a next downstream device.

Abstract: A method of stressing a network device includes sending an echo request having a payload to the network device. The payload is configured to stress the network device. The method also includes determining whether the network device is healthy despite receiving the payload.

Abstract: Timing of a write and read strobes for a memory having a double data rate (DDR) interface are automatically adjusted using write-read operations. A first and a second value of the write and read strobes are determined for a first write-read operation having the read data match the write data. A second write-read operation is performed for each of a plurality of third values for the write strobe at the second value for the read strobe set. A center of the third values having the read data match the write data is determined. A third write-read operation is performed for each of a plurality of fifth values for the read strobe at the fourth value of the write strobe. A center of the fifth values having the read data match the write data is determined. The timing of the write and read strobes are set to the centers.

Abstract: Network devices, systems and methods are described that configure a network device user interface. One method includes receiving input to define user-selectable information from among a list of pre-arranged network information presented on a network device display. The method includes configuring the user-selectable information into a particular grouping and presenting the user-selectable information according to the particular grouping.

Abstract: Timing of a write and read strobes for a memory having a double data rate (DDR) interface are automatically adjusted using write-read operations. A first and a second value of the write and read strobes are determined for a first write-read operation having the read data match the write data. A second write-read operation is performed for each of a plurality of third values for the write strobe at the second value for the read strobe set. A center of the third values having the read data match the write data is determined. A third write-read operation is performed for each of a plurality of fifth values for the read strobe at the fourth value of the write strobe. A center of the fifth values having the read data match the write data is determined. The timing of the write and read strobes are set to the centers.

Abstract: Embodiments of the present invention relate to the filling of cache memory for cache memory initialization. In one embodiment, cache architecture dependent data is loaded into cacheable memory. The flow of initialization execution is transferred to the cache architecture dependent data in response to a trigger that indicates that an initialization of cache memory has been initiated. Each line contained in cache memory is filled using the cache architecture dependent data. The flow of initialization execution is returned back to the place in the initialization process from which it was transferred when the filling of cache memory is completed.

Abstract: In one embodiment of the invention, a method for detecting a network loop problem in a network, includes: selecting a known static address of a selected device which should normally be detected at not more than one port of a downstream device; determining if the static address is detected in more than one port in a downstream device, wherein the current downstream device includes a first port which normally detects the known static address and a second port; if the static address is detected at the second port of the current downstream device, then determining the connection to the second port and if the connection to the second port is a leaf, then identifying the leaf as a misbehaving node, and if the connection to the second port is not a leaf, then evaluating a next downstream device.

Abstract: A method of, shared register system and system for controlling access to a register are described. The shared register stores a plurality of bits including control and data bits. An access signal and a combined signal including a control portion and a data portion are received and the data portion of the combined signal is written to one or more data bits of the shared register corresponding to the control portion of the combined signal. A shared register system for controlling access to portions of a shared register includes a register having storage for bits and a register access control configured to receive an access signal and a combined signal. The register access control is operatively connected with the register to control write access to the register based on the access signal and the control portion of the combined signal.

Abstract: A network hub responds to network problems by generating traps in conformance with the Simple Network Management Protocol (SNMP). In generating a trap, the hub includes a Uniform Resource Locator (URL) as a text string incorporated in the trap. The network hub incorporates a server conforming to the HyperText Transfer Protocol (HTTP) used by the World Wide Web. The server has its own home page and the URL incorporated in the trap points to a subpage of that home page. When a network management station receives the trap, the URL is displayed as a hypertext link. When the link is “clicked”, a web browser is activated and is pointed to the URL so that an HTTP “get” command is transmitted. When the hub receives the “get” command, it responds by generating the requested subpage. The subpage is presented as a World Wide Web page with a full presentation of data relating to the event triggering the trap.

Abstract: One embodiment disclosed relates to a laptop computer system including a display casing, having display circuitry and a display screen, and a main computer casing coupled to the display casing. The main computer casing includes a battery power source, a charging regulator, and an Ethernet-type connector. The battery power source is coupled to a motherboard switching regulator. The charging regulator is coupled to the battery power source and configured to recharge the battery power source. The Ethernet-type connector coupled to the charging regulator and configured to provide power thereto.

Abstract: A network hub responds to network problems by generating traps in conformance with the Simple Network Management Protocol (SNMP). In generating a trap, the hub includes a Uniform Resource Locator (URL) as a text string incorporated in the trap. The network hub incorporates a server conforming to the HyperText Transfer Protocol (HTTP) used by the World Wide Web. The server has its own home page and the URL incorporated in the trap points to a subpage of that home page. When a network management station receives the trap, the URL is displayed as a hypertext link. When the link is “clicked”, a web browser is activated and is pointed to the URL so that an HTTP “get” command is transmitted. When the hub receives the “get” command, it responds by generating the requested subpage. The subpage is presented as a World Wide Web page with a full presentation of data relating to the event triggering the trap.

Abstract: A network hub responds to network problems by generating traps in conformance with the Simple Network Management Protocol (SNMP). In generating a trap, the hub includes a Uniform Resource Locator (URL) as a text string incorporated in the trap. The network hub incorporates a server conforming to the HyperText Transfer Protocol (HTTP) used by the World Wide Web. The server has its own home page and the URL incorporated in the trap points to a subpage of that home page. When a network management station receives the trap, the URL is displayed as a hypertext link. When the link is “clicked”, a web browser is activated and is pointed to the URL so that an HTTP “get” command is transmitted. When the hub receives the “get” command, it responds by generating the requested subpage. The subpage is presented as a World Wide Web page with a full presentation of data relating to the event triggering the trap.

Abstract: An automatic loop-elimination system embodied in a network hub minimizes the impact of port deactivation by deactivating only one port at a time. To reduce the likelihood of concurrent examination of ports (of different hubs) coupled to other hubs, the port at which examination begins is randomized at network startup. To reduce the likelihood of concurrently examined ports (of different hubs) being deactivated at the same time, a brief re-poll of port utilization is run just before deactivation; if the first deactivation eliminates the loop, the second port is not deactivated. For each hub, the method cycles through the ports three times, progressively including more heavily cascaded ports. This progressive relaxation of a cascade constraint preferentially deactivates ports coupled to end-node devices before ports coupled to other hubs. Thus, the invention provides for fast and convenient automatic loop elimination without requiring external hardware or software.