Patents by Inventor Craig Amrine

Craig Amrine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070212865
    Abstract: A method for constructing an electronic assembly is provided. A substrate having first and second opposing surfaces and an integrated circuit formed therein is provided. A protective layer is formed over the first surface of the substrate. A via opening is formed through the protective layer and into the first surface of the substrate. A conductive via is formed in the via opening. The conductive via has an end at a first elevation relative to the first surface of the substrate. The end of the conductive via is ground such that the end of the conductive via is at a second elevation relative to the first surface of the substrate. The second elevation is less than the first elevation.
    Type: Application
    Filed: March 8, 2006
    Publication date: September 13, 2007
    Inventors: Craig Amrine, Owen Fay
  • Publication number: 20060128066
    Abstract: Methods and apparatus are provided for use in manufacturing a device packaging comprising the steps of: positioning a metal substrate such as spring steel on a magnetic plate so as to expose a surface of the metal substrate; placing a first tape layer on the exposed surface of a metal substrate so as to expose a nonstick surface of the first tape layer such as PTFE; placing a second tape layer on the exposed surface of the first tape layer so as to expose a surface of the second tape layer; positioning a mold frame on the exposed surface of the second tape layer; positioning a die within the mold frame; depositing epoxy within the mold frame; curing the epoxy so as to create a molded panel; removing the mold frame; grinding the molded panel to a desired thickness; separating the first tape layer from the second tape layer so as to separate the metal substrate from the molded panel; and peeling the second tape layer from the molded panel.
    Type: Application
    Filed: December 10, 2004
    Publication date: June 15, 2006
    Inventors: William Lytle, Craig Amrine
  • Patent number: 6953985
    Abstract: An exemplary method and apparatus for MEMS device wafer level and/or array packaging comprises inter alia an EM shielding array of dielectric lid elements (340) sealed to a MEMS device die array (300) to produce a sealed MEMS device package array (330). Disclosed features and specifications may be variously controlled, adapted or otherwise optionally modified to improve hermetic sealing and/or EM shielding for any MEMS device. An exemplary embodiment of the present invention representatively provides for wafer level packaging of RF MEMS switches prior to device singulation.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: October 11, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jong-Kai Lin, William H. Lytle, Owen Fay, Steven Markgraf, Henry G. Hughes, Craig Amrine, Ananda P. De Silva
  • Publication number: 20050176180
    Abstract: A process for encapsulating an integrated circuit die (403) using a porous carrier (101). In one example, an adhesive structure (e.g. tape) is applied to a porous carrier. Integrated circuit die is then placed on the adhesive structure. The integrated circuit die is then encapsulated to form an encapsulated structure (505). The carrier is then subjected to a solvent that passes through the carrier to reduce the adhesive strength of the adhesive structure for removal of the carrier from the encapsulated structure.
    Type: Application
    Filed: February 9, 2004
    Publication date: August 11, 2005
    Inventors: Owen Fay, Craig Amrine, Kevin Lish
  • Publication number: 20040016995
    Abstract: An exemplary method and apparatus for MEMS device control-chip integration and packaging comprises inter alia: a device substrate (300) comprising at least one MEMS device element (315) and at least a first interconnect pad (350); and a control-chip lid substrate (460) comprising at least a second interconnect pad (410), wherein the first interconnect pad (350) is suitably adapted for substantial engagement with the second interconnect pad (410) in order to communicably connect an integrated control chip (400) to a MEMS device element (315). Disclosed features and specifications may be variously controlled, adapted or otherwise optionally modified to improve component density and/or form factor for any MEMS device. An exemplary embodiment of the present invention representatively provides for HV control-chip driver integration and packaging of RF MEMS switches.
    Type: Application
    Filed: July 25, 2002
    Publication date: January 29, 2004
    Inventors: Shun Meen Kuo, Juergen A. Foerstner, Steven Markgraf, Craig Amrine, Ananda P. De Silva, Heidi Denton, Darrel Frear, Henry G. Hughes, Stephen B. Springer
  • Publication number: 20030230798
    Abstract: An exemplary method and apparatus for MEMS device wafer level and/or array packaging comprises inter alia an EM shielding array of dielectric lid elements (340) sealed to a MEMS device die array (300) to produce a sealed MEMS device package array (330). Disclosed features and specifications may be variously controlled, adapted or otherwise optionally modified to improve hermetic sealing and/or EM shielding for any MEMS device. An exemplary embodiment of the present invention representatively provides for wafer level packaging of RF MEMS switches prior to device singulation.
    Type: Application
    Filed: June 12, 2002
    Publication date: December 18, 2003
    Inventors: Jong-Kai Lin, William H. Lytle, Owen Fay, Steven Markgraf, Henry G. Hughes, Craig Amrine, Ananda P. De Silva
  • Patent number: 6459198
    Abstract: A method of fabricating a high vacuum display with flat form factor, and the display, include an envelope with two major, parallel spaced apart glass sides and a continuous edge therebetween. An opening is formed through one of the glass sides of the envelope. A plate is provided with an area larger than the opening in the envelope. A button with an area slightly smaller than the opening may be formed on one side of the plate. A low temperature melting material is positioned on the plate around the button and the envelope is positioned in a substantial vacuum. The button is placed in the opening with the plate abutting the glass side outside of the envelope and the low temperature melting material is melted using heat and/or pressure to sealingly engage the button within the opening.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: October 1, 2002
    Assignee: Motorola, Inc.
    Inventors: Kenneth A. Dean, Babu R. Chalamala, Dave Uebelhoer, Craig Amrine
  • Patent number: 6366009
    Abstract: A method for fabricating a field emission display (100) includes the steps of providing a cathode plate (102), providing an anode plate (104), providing a spacer substrate (160) made from a bulk spacer material (109), cutting the spacer substrate (160) to define a spacer (108) having a surface (107), passivating the surface (107) of the spacer (108) using the bulk spacer material (109) to form a passivation layer, and disposing the spacer (108) between the cathode plate (102) and the anode plate (104). A field emission display (100) which includes a cathode plate (102) having a plurality of electron emitters (124), an anode plate (104) opposing the cathode plate (102), and a spacer (108) extending between the cathode plate (102) and anode plate (104). The spacer (108) has a passivation layer made from bulk spacer material (109).
    Type: Grant
    Filed: August 2, 1999
    Date of Patent: April 2, 2002
    Assignee: Motorola, Inc.
    Inventors: Peter A. Smith, Joyce K. Yamamoto, Craig Amrine, Thomas Nilsson, Steven M. Smith
  • Patent number: 6149484
    Abstract: A field emission display (400) includes a cathode plate (410), an anode plate (430), and a mechanical support/getter assembly (300) being disposed between the cathode plate (410) and the anode plate (430). The mechanical support/getter assembly (300) includes a unitary spacer/frame assembly (310) made from a photosensitive glass. A method for fabricating the mechanical support/getter assembly (300) includes the steps of: selectively exposing inter-spacer regions (110) and a getter frame region (120) of a layer (100) of the photosensitive glass to UV radiation, heating the layer (100) to crystallize the UV-exposed regions, and removing the crystallized inter-spacer regions (110) and partially removing the crystallized getter frame regions by contacting the layer (100) with an acid, thereby forming spacer ribs (314) and a getter land (322). The method further includes providing a getter frame (320) on the spacer land (322).
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: November 21, 2000
    Assignee: Motorola, Inc.
    Inventors: Craig Amrine, Clifford L. Anderson, Ronald O. Petersen
  • Patent number: 6114802
    Abstract: A field emission device (400) includes a plastically-deformable, ceramic, stamped substrate (200) made from a plastically deformable ceramic, which in the preferred embodiment includes a calendered tape. The plastically-deformable, ceramic, stamped substrate (200) includes first and second opposed surfaces (202, 204) and defines apertures (206) in which are formed extraction electrodes (410). The field emission device (400) further includes an electron-emissive layer (418) being formed on the first opposed surface (202). Cathodes (420) are disposed on the electron-emissive layer (418) and cross the extraction electrodes (410) at an angle of 90.degree.. A method for fabricating said field emission device (400) includes stamping a layer (100) of the softened calendered tape with a die (300) to define the apertures (206) and grooves (208, 212, 214).
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: September 5, 2000
    Assignee: Motorola, Inc.
    Inventors: Craig Amrine, Kenneth Dean, Curtis D. Moyer
  • Patent number: 6042445
    Abstract: A method for affixing spacers (126, 226, 326) in a field emission display (100, 200, 300) includes the steps of: (i) providing a first display plate; providing a plurality of spacers (126, 226, 326) having first (128, 228, 328) and second opposed edges (130, 230, 330), (ii) coating first opposed edge (128, 228, 338) with a bonding layer (132, 232, 332), (iii) forming a metallic bonding pad (134, 234) on an inner surface (106, 206, 306) of first display plate, and (iv) applying a energy beam (136, 236, 336) to the bonding layer (132, 232, 332) and metallic bonding pad (134, 234), thereby forming a metallic bond.
    Type: Grant
    Filed: June 21, 1999
    Date of Patent: March 28, 2000
    Assignee: Motorola, Inc.
    Inventors: Craig Amrine, Curtis D. Moyer
  • Patent number: 5990613
    Abstract: A field emission display (100) includes a cathode plate (102) having a plurality of electron emitters (124), an anode plate (104) opposing the cathode plate (102), and a bulk-resistive spacer (108) extending between the anode plate (104) and the cathode plate (102). The bulk-resistive spacer (108) is made from an electrically conductive material. The resistivity of the electrically conductive material is selected to remove impinging charges while preventing excessive power loss due to electrical current through the bulk-resistive spacer (108) from the anode plate (104) to the cathode plate (102).
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: November 23, 1999
    Assignee: Motorola, Inc.
    Inventors: Scott K. Ageno, Peter A. Smith, Rong-Fong Huang, Joyce K. Yamamoto, Craig Amrine
  • Patent number: 5980346
    Abstract: A method is provided for fabricating a display spacer assembly (100, 400, 500) useful in the fabrication of large-area field emission displays (200, 600). The method includes the steps of: forming slots (12, 22, 32, 33) in a substrate (10, 23, 30) thereby providing a jig; providing spacers (14, 24, 34) having lower rounded edges and upper edges; placing the lower rounded edges into the slots (12, 22, 32, 33) so that the spacers (14, 24, 34) are positioned in a predetermined layout pattern over the slotted jig surface; and placing the upper edges of the spacers (14, 24, 34) in abutting engagement with a display plate (18, 10) of a field emission display.
    Type: Grant
    Filed: July 14, 1997
    Date of Patent: November 9, 1999
    Assignee: Motorola, Inc.
    Inventors: Clifford L. Anderson, Craig Amrine, Jeffery A. Whalin
  • Patent number: 5945780
    Abstract: A field emission display (200) includes a cathode plate (202); a substrate (102) opposing the cathode plate (202); a conductive matrix (104) disposed on the substrate (102) and having via walls (103) defining a plurality of phosphor vias (105); a phosphor (106, 108, 110) disposed within each of the phosphor vias (105); and a gas-adsorption material distributed within the conductive matrix (104). A method for fabricating the field emission display (200) includes the steps of silk-screening onto the substrate (102) a screenable suspension, which is made from a glass, a metal, a gas-adsorption material, and a photo-sensitive material, to form a film; photo-patterning the film to form a phosphor via (105); depositing a phosphor material into the phosphor via (105) to form an anode plate (100); and affixing the cathode plate (202) to the anode plate (100).
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: August 31, 1999
    Assignee: Motorola, Inc.
    Inventors: Arthur J. Ingle, Charles Rowell, Babu Chalamala, Ronald O. Petersen, Craig Amrine, Matthew Stainer
  • Patent number: 5894193
    Abstract: A field emission display (400) includes a cathode plate (410), an anode plate (430), and a mechanical support/getter assembly (300) being disposed between the cathode plate (410) and the anode plate (430). The mechanical support/getter assembly (300) includes a unitary spacer-frame assembly (310) made from a photosensitive glass. A method for fabricating the mechanical support/getter assembly (300) includes the steps of: selectively exposing inter-spacer regions (110) and a getter frame region (120) of a layer (100) of the photosensitive glass to UV radiation, heating the layer (100) to crystallize the UV-exposed regions, and removing the crystallized inter-spacer regions (110) and partially removing the crystallized getter frame regions by contacting the layer (100) with an acid, thereby forming spacer ribs (314) and a getter land (322). The method further includes providing a getter frame (320) on the spacer land (322).
    Type: Grant
    Filed: March 5, 1997
    Date of Patent: April 13, 1999
    Assignee: Motorola Inc.
    Inventors: Craig Amrine, Clifford L. Anderson, Ronald O. Petersen
  • Patent number: 5717287
    Abstract: A method for affixing a plurality of spacers (150, 250) within a field emission display (100, 200) is disclosed. The method includes the steps of: (i) forming a metallic bonding pad (160, 260) on the inner surface of the anode (110) or cathode (230) (ii) placing an edge of the spacers (150, 250) in intimate physical contact with a portion of the metallic bonding pad (160, 260) thereby providing contacting surfaces (iii) applying a potential difference of about 1000 Volts across the contacting surfaces so that the metallic bonding pad (160, 260) is biased positively with respect to the spacers (150, 250), and (iv) simultaneously heating the region about, and including, the bonding surfaces to a temperature of about 400 degrees Celsius for about 15 minutes so that an anodic bond is formed between the contacting surfaces.
    Type: Grant
    Filed: August 2, 1996
    Date of Patent: February 10, 1998
    Assignee: Motorola
    Inventors: Craig Amrine, Kenneth Dean
  • Patent number: 5708325
    Abstract: A method is provided for fabricating a display spacer assembly (100, 400, 500) useful in the fabrication of large-area field emission displays (200, 600). The method includes the steps of: forming slots (12, 22, 32, 33) in a substrate (10, 23, 30) thereby providing a jig; providing spacers (14, 24, 34) having lower rounded edges and upper edges; placing the lower rounded edges into the slots (12, 22, 32, 33) so that the spacers (14, 24, 34) are positioned in a predetermined layout pattern over the slotted jig surface; and placing the upper edges of the spacers (14, 24, 34) in abutting engagement with a display plate (18, 10) of a field emission display.
    Type: Grant
    Filed: May 20, 1996
    Date of Patent: January 13, 1998
    Assignee: Motorola
    Inventors: Clifford L. Anderson, Craig Amrine, Jeffery A. Whalin