Patents by Inventor Craig Andyke

Craig Andyke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Forming strained source drain junction field effect transistors
    Patent number: 6911706
    Abstract: By providing a high dose germanium implant and then forming a P-type source/drain extension, a strained source/drain junction may be formed. The strained source/drain junction may be shallower and have lower resistivity in some embodiments.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: June 28, 2005
    Assignee: Intel Corporation
    Inventors: Jack Hwang, Craig Andyke, Mitchell Taylor
  • Codoping of source drains using carbon or fluorine ion implants to improve polysilicon depletion
    Publication number: 20040102013
    Abstract: In accordance with some embodiments, codoping with carbon or fluorine and phosphorous may form NMOS source drain junctions with desirable short channel performance, improved drive current, and desirable polysilicon depletion. Thus, phosphorous doping levels may be increased, improving transistor performance without other significant adverse effects.
    Type: Application
    Filed: November 27, 2002
    Publication date: May 27, 2004
    Inventors: Jack Hwang, Mitchell Taylor, Craig Andyke, Mark Armstrong, Jerry Zietz, Harold Kennel, Stephen Cea, Thomas Hoffman, Seok-Hee Lee
  • Forming strained source drain junction field effect transistors
    Publication number: 20040038468
    Abstract: By providing a high dose germanium implant and then forming a P-type source/drain extension, a strained source/drain junction may be formed. The strained source/drain junction may be shallower and have lower resistivity in some embodiments.
    Type: Application
    Filed: August 20, 2003
    Publication date: February 26, 2004
    Inventors: Jack Hwang, Craig Andyke, Mitchell Taylor
  • Forming strained source drain junction field effect transistors
    Patent number: 6638802
    Abstract: By providing a high dose germanium implant and then forming a P-type source/drain extension, a strained source/drain junction may be formed. The strained source/drain junction may be shallower and have lower resistivity in some embodiments.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: October 28, 2003
    Assignee: Intel Corporation
    Inventors: Jack Hwang, Craig Andyke, Mitchell Taylor