Abstract: Provided herein are methods and systems for providing wide bandwidth using the present twisted pair telephone network. The methods and systems increase the bandwidth of ADSL by statistically sharing the bandwidth of many twisted pair in the neighborhood. An active subscriber would communicate over several twisted pair in the neighborhood, thereby obtaining a dramatic increase in bandwidth.

Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal struutures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.

Abstract: A heterostructure device includes a ridge-waveguide laser monolithically integrated with a ridge-waveguide rear facet monitor (RFM). An integral V-groove etched directly into the device substrate enables passive alignment of an optical fiber to the active region of the laser. The laser and RFM facets were formed using an in-situ multistep reactive ion etch process.

Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal structures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.

Abstract: A method of selectively tuning the bandedge of a semi-conductor heterostructure includes forming a disordered region which is spatially separated from a quantum well active region, and subsequently annealing the heterostructure so that vacancies/defects in the disordered region diffuse into the quantum well region and enhance interdiffusion at the well-barrier heterojunctions. The tuning is spatially selective when the heterostructure is masked so that exposed portions correspond to regions where bandgap tuning is desirable. The heterostructures of interest are III-V material systems, such as AlGaAs/GaAs, where the active region includes structures such as a single quantum well, a multiple quantum well, or a superlattice.

Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal structures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.

Abstract: A method of passively aligning optical receiving elements such as fibers to the active elements of a light generating chip includes the steps of forming two front and one side pedestal structures on the surface of a substrate body, defining a vertical sidewall of the chip to form a mating channel having an edge at a predetermined distance from the first active element, mounting the chip epi-side down on the substrate surface, and positioned the fibers in fiber-receiving channels so that a center line of each fiber is aligned to a center line of a respective active element. When mounted, the front face of the chip is abutting the contact surfaces of the two front pedestals, and the defined sidewall of the mating channel is abutting the contact surface of the side pedestal. The passive alignment procedure is also effective in aligning a single fiber to a single active element.

Abstract: A method of passively aligning optical receiving elements such as fibers to the active elements of a light generating chip includes the steps of forming two front and one side pedestal structures on the surface of a substrate body, defining a vertical sidewall of the chip to form a mating channel having an edge at a predetermined distance from the first active element, mounting the chip epi-side down on the substrate surface, and positioning the fibers in fiber-receiving channels to that a center line of each fiber is aligned to a center line of a respective active element. When mounted, the front face of the chip is abutting the contact surfaces of the two front pedestals, and the defined sidewall of the mating channel is abutting the contact surface of the side pedestal. The passive alignment procedure is also effective in aligning a single fiber to a single active element.

Abstract: An IMSM photodetector structure comprises a GaAs substrate, a buffer region grown on the substrate, an optically active absorbing layer of In.sub.0.42 Ga.sub.0.58 As grown on the absorbing layer. The buffer region includes in sequence a first layer of In.sub.0.23 Ga.sub.0.77 As, an In.sub.0.46 Ga.sub.0.54 As/GaAs superlattice, and a second layer of In.sub.0.23 Ga.sub.0.77 As. An interdigitated pattern of Schottky metal contacts is fabricated on the Al.sub.0.3 Ga.sub.0.7 As/GaAs superlattice. This structure is useful in fabricating long-wavelength, monolithic receivers based on GaAs MESFET technology since the optical and electrical characteristics of the structure are preserved during the thermal annealing cycle necesary in ion-implaned GaAs MESFET processes.

Abstract: A method of rapid thermal annealing a wafer of an ion implanted III-V compound semiconductor material by heating the wafer in close proximity to a III-V compound semiconductor wafer coated with a layer of tin or indium. A localized overpressure of the Group V element is produced by the combination of the III and V elements with the tin or indium tending to reduce surface decomposition of the implanted wafer.

Abstract: Method of fabricating a junction field effect transistor, specifically a static induction transistor, which may be of GaAs. Elongated N-type source regions are formed in an N-type epitaxial layer of semiconductor material grown on a substrate. A tri-level mask is formed having elongated openings exposing portions of the epitaxial layer intermediate between the source regions. The openings are wider at the bottom than at the top. P-type gate regions are formed by ion-implanting P-type doping material through the mask openings. Silicon dioxide is deposited through the openings by angle evaporation to form generally trapezoidal-shaped temporary gate members over the gate regions. The tri-level mask is removed, a layer of silicon nitride is deposited, and a layer of masking material is deposited. Some of the masking material is removed; then the temporary gate members and silicon nitride immediately adjacent thereto are removed.

Abstract: Method of fabricating a monolithic integrated circuit structure incorporating a complementary pair of GaAs/AlGaAs modulation-doped field effect transistors (MODFET's) including providing a substrate of semi-insulating GaAs, depositing an epitaxial layer of undoped AlGaAs on its surface, and ion-implanting a heavily doped N-type donor region and a heavily doped P-type acceptor region in the undoped AlGaAs. A thin spacer layer of undoped AlGaAs is epitaxially deposited on the previously deposited AlGaAs layer, and an epitaxial layer of undoped GaAs is deposited on the spacer layer. First and second gate members which form Schottky barriers with the GaAs are placed on the GaAs layer overlying portions of the N-type donor region and P-type acceptor region, respectively. N-type source and drain zones are formed in the GaAs layer on opposite sides of the first gate member, and P-type source and drain zones are formed in the GaAs layer on opposite sides of the second gate member.