Patents by Inventor Craig Barrack

Craig Barrack has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040151184
    Abstract: Apparatus and methods of providing rate control at a user access point of an edge network node of a packet switched communications network are described. Rate control mechanisms are presented in respect of both ingress and egress rate control with quality of service support. Multiple thresholds associated with a single leaky bucket per traffic flow direction enable the mechanism to selectively control traffic rates based on a traffic class priority criteria.
    Type: Application
    Filed: December 5, 2003
    Publication date: August 5, 2004
    Applicant: Zarlink Semiconductor V.N. Inc.
    Inventors: Linghsiao Wang, Craig Barrack
  • Publication number: 20040066779
    Abstract: A method of context switchover continuity is disclosed in which a context is sent from a transmitting entity to a receiving entity. Initial first and second context state entries are maintained in respective tables at the transmitting entity and at the receiving entity. The initial first and second context state entries include context state information about the context. New reconfigured first and second context state entries are created at the transmitting entity and the receiving entity having reconfigured context state information. The new reconfigured first and second context state entries are activated so as to enable the sending of a reconfigured context from a transmitting entity to a receiving entity. A plurality of contexts are included, and each of the plurality of contexts has respective initial first and second context entries in the respective tables.
    Type: Application
    Filed: October 4, 2002
    Publication date: April 8, 2004
    Inventors: Craig Barrack, Rong-Feng Chang, Anthony Walker
  • Publication number: 20040008715
    Abstract: Methods and apparatus are presented for scheduling playback for voice data sample packet payloads conveyed over best-effort packet-switched infrastructure. The hardware implementation presented provides support for concurrent and independent comfort noise insertion and for dynamic clock adjustment for telephone sessions provisioned concurrently without making recourse to signaling. The apparatus and methods support high density solutions scaleing up to large numbers of concurrently provisioned telephone sessions.
    Type: Application
    Filed: July 15, 2002
    Publication date: January 15, 2004
    Applicant: Zarlink Semiconductor V.N. Inc.
    Inventors: Craig Barrack, James Yik
  • Publication number: 20040003020
    Abstract: Methods and apparatus for hardware scheduling processes handling are presented. The apparatus includes a table of task lists. Each task list has specifications of processes requiring handling during a corresponding time interval. Each task list is parsed by a scheduler during a corresponding interval and the processes specified therein are handled. The methods of process handling may include a determination of a next time interval in which the process requires handling and inserting of process specifications in task lists corresponding to the determined next handling times. Implementations are also presented in which task lists specify work units requiring handling during corresponding time intervals. The entire processing power of the scheduler is used to schedule processes for handling. Advantages are derived from an efficient use of the processing power of the scheduler as the number of processes is increased.
    Type: Application
    Filed: May 7, 2002
    Publication date: January 1, 2004
    Inventors: James Yik, Craig Barrack
  • Publication number: 20030219007
    Abstract: A packet based real-time data receiver comprising a protocol specific plug-in and a generic playback engine. The protocol specific plug-in receives a packet, parses the packet, generates a timestamp, and forwards the packet to the generic playback engine. The playback engine determining the playback time based on the timestamp, and for playing back the packet at the appropriate time. Any kind of packet may be processed by merely changing the protocol specific plug-in.
    Type: Application
    Filed: May 23, 2002
    Publication date: November 27, 2003
    Inventors: Craig Barrack, James Yik
  • Publication number: 20030179780
    Abstract: A method of and apparatus for detecting drift between two clocks is presented. The apparatus comprises a hardware implementation of a clock drift evaluator. The evaluator monitors received packets associated with a data stream, and extracts a time stamp generated by a source clock from each packet. A difference d between the extracted time stamp and the local time is compared against a d_ref value to determine whether the packet was received early or late. On a prescribed schedule, the degree of late and early receipt of packets is compared against a tolerance level to determine whether a relative drift exists between the pacing of the source clock and the pacing of the local clock. The detection of drift between the two clocks provides support for service level guarantees in provisioning data streaming services in packet-switched environments.
    Type: Application
    Filed: March 20, 2002
    Publication date: September 25, 2003
    Applicant: Zarlink Semiconductor V.N. Inc.
    Inventors: Anthony Walker, Craig Barrack
  • Publication number: 20020089978
    Abstract: A system and method for implementing a control channel in a packet switched communications network. In a computer network, such as a local area network (LAN) it is known to utilize the Ethernet for distributing communications between stations. The Ethernet employs a standard frame format that includes header frames and, in particular a preamble frame which may be used to provide synchronization information between switching devices or nodes. The preamble frame is not required in a Gigabit Ethernet implementation and the present invention employs a portion of the preamble frame to implement a control channel between switching devices.
    Type: Application
    Filed: January 8, 2001
    Publication date: July 11, 2002
    Inventors: Linghsiao Wang, Craig Barrack, Rong-Feng Chang
  • Publication number: 20020039351
    Abstract: A method of scheduling queue servicing in a data packet switching environment is provided. The method includes a sequence of cyclical steps. The output queues are scheduled for servicing on a least credit value basis. An output queue is selected from a group of output queues associated with a communications port. The selected output port has at least one Payload Data Unit (PDU) pending transmission and a lowest credit value associated therewith. At least one PDU having a length is transmitted from the selected output queue and the credit value is incremented taking the length of the transmitted PDU into consideration. The transmission of PDUs is divided into transmission periods. Once per transmission period credit values associated with output queues holding PDUs pending transmission are decremented in accordance with transmission apportionments assigned for each output queue. The method emulates weighted fair queue servicing with minimal computation enabling hardware implementation thereof.
    Type: Application
    Filed: March 15, 2001
    Publication date: April 4, 2002
    Inventors: Linghsiao Wang, Craig Barrack, Rong-Feng Chang
  • Publication number: 20020039350
    Abstract: A method of utilizing shared memory resources in switching Protocol Data Units (PDUs) at a data switching node is presented. The method includes reserving: a temporary memory storage portion for storing PDUs prior to queuing for processing thereof, a Class-of-Service memory storage portion to provide support Quality-of-Service guarantees, a shared memory-pool portion and an input port memory storage portion enabling non-blocking input port flow control. Provisions are made for PDU discard decisions to be delayed until after PDU headers are inspected subsequent to the receipt of each PDU. Provisions are made for well-behaved data flows conveyed via an input port to be protected against blocking from misbehaving data flows conveyed via other input ports of the data switching node.
    Type: Application
    Filed: August 23, 2001
    Publication date: April 4, 2002
    Applicant: Zarlink Semiconductor V.N. Inc.
    Inventors: Linghsiao Wang, Craig Barrack, Rong-Feng Chang