Patents by Inventor Craig C. Hunter

Craig C. Hunter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for controlling wake events in a data processing system
    Patent number: 9900390
    Abstract: A system and methods controlling wake events in a data processing system is described. A broadcast wake-up signal staggering order is determined in response to a first wake event. A staggered broadcast wake-up signal is distributed to a plurality of processing elements based on the broadcast wake-up signal staggering order. The broadcast wake-up signal staggering order is changed in response to a second wake event. And a changed staggered broadcast wake-up signal is distributed to a plurality of processing elements based on the changed broadcast wake-up signal staggering order.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: February 20, 2018
    Assignee: NXP USA, INC.
    Inventors: David C. Holloway, Benjamin C. Eckermann, Joseph P. Gergen, Craig C. Hunter, Bryan D. Marietta, David W. Todd
  • METHOD AND APPARATUS FOR CONTROLLING WAKE EVENTS IN A DATA PROCESSING SYSTEM
    Publication number: 20160344820
    Abstract: A system and methods controlling wake events in a data processing system is described. A broadcast wake-up signal staggering order is determined in response to a first wake event. A staggered broadcast wake-up signal is distributed to a plurality of processing elements based on the broadcast wake-up signal staggering order. The broadcast wake-up signal staggering order is changed in response to a second wake event. And a changed staggered broadcast wake-up signal is distributed to a plurality of processing elements based on the changed broadcast wake-up signal staggering order.
    Type: Application
    Filed: May 21, 2015
    Publication date: November 24, 2016
    Inventors: David C. HOLLOWAY, Benjamin C. ECKERMANN, Joseph P. GERGEN, Craig C. HUNTER, Bryan D. MARIETTA, David W. TODD
  • Clock scan design from sizzle global clock and method therefor
    Patent number: 5748645
    Abstract: A scan based test methodology generates conventional functional clocks (CLK1 and CLK2) and test clocks (CLKA and CLKB) from a single input clock (GCLK). The methodology allows an integrated circuit (10) designed according to it to be tested at the part's operating frequency. Also, the test methodology is compatible with known test methodologies such as level sensitive scan design ("LSSD"). The pre-existing body of test programs and equipment can be used with a circuit incorporating the invention. The single clock requirement also simplifies design.
    Type: Grant
    Filed: May 29, 1996
    Date of Patent: May 5, 1998
    Assignee: Motorola, Inc.
    Inventors: Craig C. Hunter, Russell A. Reininger
  • CMOS implementation of a built-in self test input generator (BISTIG)
    Patent number: 4893311
    Abstract: A CMOS implementation of a Built In Self Test Input Generator (BISTIG) for testing embedded PLA structures. The BISTIG tests for all stuck at faults, cross-point faults and bridging faults, by asserting exactly one input row and exactly one product term of the PLA under test at a time.
    Type: Grant
    Filed: April 25, 1988
    Date of Patent: January 9, 1990
    Assignee: Motorola, Inc.
    Inventors: Craig C. Hunter, Thomas S. Spohrer