Patents by Inventor Craig D. Suitor

Craig D. Suitor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Providing a timing source for multiple nodes coupled to a circuit-switched network
    Patent number: 9148240
    Abstract: A communications network includes multiple distributed nodes that are coupled by a circuit-switched network. To improve efficiency, a plurality of the nodes are associated with a single source synchronization block that injects timing messages over circuits in the circuit-switched network to the plurality of nodes. Each of the plurality of nodes is associated with a timing extraction and recovery block that extracts information from the timing messages injected by the source synchronization block to synchronize a local clock in each node to the frequency and phase of a clock received by the source synchronization block.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: September 29, 2015
    Assignee: Apple Inc.
    Inventors: Glenn G Algie, Eric C Valk, Craig D Suitor
  • MEMORY DEVICE WITH INTERNAL SIGNAL PROCESSING UNIT
    Publication number: 20130287049
    Abstract: A communications network includes multiple distributed nodes that are coupled by a circuit-switched network. To improve efficiency, a plurality of the nodes are associated with a single source synchronization block that injects timing messages over circuits in the circuit-switched network to the plurality of nodes. Each of the plurality of nodes is associated with a timing extraction and recovery block that extracts information from the timing messages injected by the source synchronization block to synchronize a local clock in each node to the frequency and phase of a clock received by the source synchronization block.
    Type: Application
    Filed: April 3, 2013
    Publication date: October 31, 2013
    Inventors: Glenn G. Algie, Eric C. Valk, Craig D. Suitor
  • Providing a timing source for multiple nodes coupled to a circuit-switched network
    Patent number: 8432942
    Abstract: A communications network includes multiple distributed nodes that are coupled by a circuit-switched network. To improve efficiency, a plurality of the nodes are associated with a single source synchronization block that injects timing messages over circuits in the circuit-switched network to the plurality of nodes. Each of the plurality of nodes is associated with a timing extraction and recovery block that extracts information from the timing messages injected by the source synchronization block to synchronize a local clock in each node to the frequency and phase of a clock received by the source synchronization block.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: April 30, 2013
    Assignee: Apple Inc.
    Inventors: Glenn G. Algie, Eric C. Valk, Craig D. Suitor