Abstract: Disclosed is a method of manufacturing integrated circuit (IC) chips. In the method, wafers are received and the backside roughness levels of these wafers are determined. Based on the backside roughness levels, the wafers are sorted into different groups. Chips having the same design are manufactured on wafers from all of the different groups. However, during manufacturing, process(es) is/are performed differently on wafers from one or more of the different groups to minimize systematic variations in a specific parameter (e.g., wire width) in the resulting chips. Specifically, because systematic variations may occur when the exact same processes are used to form IC chips on wafers with different backside roughness levels, the method disclosed herein selectively adjusts one or more of those processes when performed on wafers from one or more of the different groups to ensure that the specific parameter is approximately equal in the resulting integrated IC chips.

Abstract: Disclosed is a method of manufacturing integrated circuit (IC) chips. In the method, wafers are received and the backside roughness levels of these wafers are determined. Based on the backside roughness levels, the wafers are sorted into different groups. Chips having the same design are manufactured on wafers from all of the different groups. However, during manufacturing, process(es) is/are performed differently on wafers from one or more of the different groups to minimize systematic variations in a specific parameter (e.g., wire width) in the resulting chips. Specifically, because systematic variations may occur when the exact same processes are used to form IC chips on wafers with different backside roughness levels, the method disclosed herein selectively adjusts one or more of those processes when performed on wafers from one or more of the different groups to ensure that the specific parameter is approximately equal in the resulting integrated IC chips.

Abstract: Disclosed is a method of manufacturing integrated circuit (IC) chips. In the method, wafers are received and the backside roughness levels of these wafers are determined. Based on the backside roughness levels, the wafers are sorted into different groups. Chips having the same design are manufactured on wafers from all of the different groups. However, during manufacturing, process(es) is/are performed differently on wafers from one or more of the different groups to minimize systematic variations in a specific parameter (e.g., wire width) in the resulting chips. Specifically, because systematic variations may occur when the exact same processes are used to form IC chips on wafers with different backside roughness levels, the method disclosed herein selectively adjusts one or more of those processes when performed on wafers from one or more of the different groups to ensure that the specific parameter is approximately equal in the resulting integrated IC chips.

Abstract: A system and method for optimizing metrology sampling rates in an advanced process control (APC) application. A method is provided for processing a run of workpieces, the method comprising the steps of: providing a database comprising subgroups of data representing characteristics from previously processed workpieces; selecting a first subgroup of data having characteristics that satisfy a predetermined criteria; determining processing conditions for a processing tool corresponding to said first subgroup of data; processing the run of workpieces with the process tool using the determined processing conditions; and measuring the run of workpieces according to a sampling rate determined from the first subgroup of data.

Abstract: A system and method for optimizing a manufacturing process. The system comprises: a database of operational data gathered from previously performed manufacturing processes; a filtering system for filtering the database into a plurality of data subsets; a calculation system for calculating evaluation criteria for a selected data subset; an analysis system for determining if the evaluation criteria meets a set of predetermined requirements; and an iteration system that selects a new data subset if the selected data subset fails to provide evaluation criteria that meets the set of predetermined requirements.

Abstract: A predictive method is used to compensate for intermediate batch sensitivities which inevitably occur during resist batch changeover. The compensation is applied to historical dose levels to arrive at a new dose level estimating an optimum dose. When the system discovers that a new batch of resist is loaded to a tool, historical data is used to calculate a reference dose for each tool. A batch factor is continuously calculated and using historical data along with the batch factor, a dose adjustment is made to maintain proper image size.

Abstract: A predictive method is used to compensate for intermediate batch sensitivities which inevitably occur during resist batch changeover. The compensation is applied to historical dose levels to arrive at a new dose level estimating an optimum dose. When the system discovers that a new batch of resist is loaded to a tool, historical data is used to calculate a reference dose for each tool. A batch factor is continuously calculated and using historical data along with the batch factor, a dose adjustment is made to maintain proper image size.

Abstract: A predictive method is used to compensate for intermediate batch sensitivities which inevitably occur during resist batch changeover. The compensation is applied to historical dose levels to arrive at a new dose level estimating an optimum dose. When the system discovers that a new batch of resist is loaded to a tool, historical data is used to calculate a reference dose for each tool. A batch factor is continuously calculated and using historical data along with the batch factor, a dose adjustment is made to maintain proper image size.

Abstract: A predictive method is used to compensate for intermediate batch sensitivities which inevitably occur during resist batch changeover. The compensation is applied to historical dose levels to arrive at a new dose level estimating an optimum dose. When the system discovers that a new batch of resist is loaded to a tool, historical data is used to calculate a reference dose for each tool. A batch factor is continuously calculated and using historical data along with the batch factor, a dose adjustment is made to maintain proper image size.

Abstract: A method of implementing a new reticle for manufacturing semiconductors on a wafer which involves performing measurements on the reticle and assigning an initial exposure dose by using a predetermined algorithm. The exposure control system utilizes reticle CD data for automatically calculating reticle exposure offset values, i.e. reticle factors. A correlation of reticle size deviations to calculated reticle factors is used to derive a reticle factor for the new reticle. The derived reticle factor is then used to predict an initial exposure condition for the new reticle which is applied to the lithography tool for achieving a wafer design dimension.

Abstract: A circuit for a sense amplifier (14) for use with a memory device (10). The circuit includes two devices (40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier (14) with a second current level, different from the first current level. The selector (44) is coupled to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices (40 and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).

Abstract: A circuit for a sense amplifier (14) for use with a memory device (10). The circuit includes two devices (40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier (14) with a second current level, different from the first current level. The selector (44) is coupled to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices (40 and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).

Abstract: A circuit for a sense amplifier (14) for use with a memory device (10). The circuit includes two devices (40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier (14) with a second current level, different from the first current level. The selector (44) is coupled to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices (40 and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).

Abstract: A circuit for a sense amplifier (14) for use with a memory device (10). The circuts includes two devices(40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier(14) with a second current level, different from the first current level. The selector (14) is couple to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices(40and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).

Abstract: A circuit for a sense amplifier (14) for use with a memory device (10). The circuit includes two devices (40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier (14) with a second current level, different from the first current level. The selector (44) is coupled to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices (40 and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).

Abstract: A circuit for a sense amplifier (14) for use with a memory device (10). The circuit includes two devices (40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier (14) with a second current level, different from the first current level. The selector (44) is coupled to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices (40 and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).