Patents by Inventor Craig Gidney
Craig Gidney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240144069Abstract: Methods, systems, and apparatus for implementing a quantum circuit that moves a surface code patch of qubits. In one aspect, a method includes performing a first surface code cycle in a system of measure and data qubits. A first CNOT gate is applied to a measure qubit and a first data qubit, where the first data qubit is coupled to the measure qubit in a first direction and the first CNOT gate targets one of the measure qubits and the first data qubit. A second CNOT gate is applied to the measure qubit and the first data qubit, where the second CNOT gate targets another of the measure qubit and the first data qubit. Performing the first surface code cycle transfers information stored by the measure qubit and information stored by the first data qubit to other qubits to logically move the measure qubit and the first data qubit.Type: ApplicationFiled: October 26, 2023Publication date: May 2, 2024Inventors: Matthew James McEwen, Craig Gidney
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Publication number: 20240135217Abstract: Methods, systems and apparatus for producing quantum circuits with low T gate counts. In one aspect, a method for performing a temporary logical AND operation on two control qubits includes the actions of obtaining an ancilla qubit in an A-state; computing a logical-AND of the two control qubits and storing the computed logical-AND in the state of the ancilla qubit, comprising replacing the A-state of the ancilla qubit with the logical-AND of the two control qubits; maintaining the ancilla qubit storing the logical-AND of the two controls until a first condition is satisfied; and erasing the ancilla qubit when the first condition is satisfied.Type: ApplicationFiled: August 2, 2023Publication date: April 25, 2024Inventor: Craig Gidney
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Patent number: 11966814Abstract: Methods and apparatus for performing surface code computations using Auto-CCZ states. In one aspect, a method for implementing a delayed choice CZ operation on a first and second data qubit using a quantum computer includes: preparing a first and second routing qubit in a magic state; interacting the first data qubit with the first routing qubit and the second data qubit with the second routing qubit using a first and second CNOT operation, where the first and second data qubits act as controls for the CNOT operations; if a received first classical bit represents an off state: applying a first and second Hadamard gate to the first and second routing qubit; measuring the first and second routing qubit using Z basis measurements to obtain a second and third classical bit; and performing classically controlled fixup operations on the first and second data qubit using the second and third classical bits.Type: GrantFiled: January 25, 2023Date of Patent: April 23, 2024Assignee: Google LLCInventors: Craig Gidney, Austin Greig Fowler
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Publication number: 20240127103Abstract: Methods, systems, and apparatus for producing CCZ states and T states. In one aspect, a method for transforming a CCZ state into three T states includes obtaining a first target qubit, a second target qubit and a third target qubit in a CCZ state; performing a X?1/2 gate on the third target qubit; performing an X gate on the first target qubit and the second target qubit using the third target qubit as a control; performing a Z gate on the first target qubit and the second target qubit using the third qubit as a X axis control; performing a Z?1/4 gate on the third target qubit; and performing a Z gate on the first target qubit and the second target qubit using the third qubit as a X axis control to obtain the three T states.Type: ApplicationFiled: December 7, 2023Publication date: April 18, 2024Inventors: Craig Gidney, Austin Greig Fowler
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Patent number: 11941488Abstract: Methods, systems, and apparatus for performing phase operations. In one aspect, a method for performing a same phase operation on a first and second qubit using a third qubit prepared in a phased plus state includes: performing a first NOT operation on the third qubit; computing a controlled adder operation on the first, second and third qubit, comprising encoding the result of the controlled adder operation in a fourth qubit; performing a square of the phase operation on the fourth qubit; uncomputing the controlled adder operation on the first, second and third qubit; performing a CNOT operation between the first qubit and the third qubit, wherein the first qubit acts as the control; performing a CNOT operation between the second qubit and the third qubit, wherein the second qubit acts as the control; and performing a second NOT operation on the third qubit.Type: GrantFiled: March 9, 2023Date of Patent: March 26, 2024Assignee: Google LLCInventor: Craig Gidney
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Patent number: 11909392Abstract: Methods, systems, and apparatus for producing CCZ states and T states. In one aspect, a method for distilling a CCZ state includes preparing multiple target qubits, ancilla qubits and stabilizer qubits in a zero state, performing an X gate for each stabilizer qubit on multiple ancilla qubits or multiple ancilla qubits and one of the target qubits using the stabilizer qubit as a control, measuring the stabilizer qubits, performing, on each of the ancilla qubits, a Z1/4 gate and a Hadamard gate, measuring each of the ancilla qubits, performing, conditioned on each measured ancilla qubit state, a NOT operation on a selected stabilizer qubit, or a NOT operation on the selected stabilizer qubit and a Z gate on one or more respective target qubits, performing, on each target qubit and conditioned on a measured state of a respective stabilizer qubit, a Z gate on the target qubit, and performing an X gate on each of the target qubits.Type: GrantFiled: November 27, 2019Date of Patent: February 20, 2024Assignee: Google LLCInventors: Craig Gidney, Austin Greig Fowler
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Publication number: 20240020560Abstract: Methods and apparatus for piecewise addition into an accumulation register using one or more carry runway registers, where the accumulation register includes a first plurality of qubits with each qubit representing a respective bit of a first binary number and where each carry runway register includes multiple qubits representing a respective binary number. In one aspect, a method includes inserting the one or more carry runway registers into the accumulation register at respective predetermined qubit positions, respectively, of the accumulation register; initializing each qubit of each carry runway register in a plus state; applying one or more subtraction operations to the accumulation register, where each subtraction operation subtracts a state of a respective carry runway register from a corresponding portion of the accumulation register; and adding one or more input binary numbers into the accumulation register using piecewise addition.Type: ApplicationFiled: June 7, 2023Publication date: January 18, 2024Inventor: Craig Gidney
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Publication number: 20230394019Abstract: Methods, systems and apparatus for performing indexed operations using a unary iteration quantum circuit. In one aspect, a method includes encoding an index value in an index register comprising index qubits; encoding the index value in a control register comprising multiple control qubits; and repeatedly computing and uncomputing the control qubits to perform, conditioned on the state of the control qubits, the operation on one or more target qubits corresponding to the index value, wherein during the encoding, computing and uncomputing: the multiple control qubits are made available in sequence, and the multiple control qubits correspond to a one-hot encoding of the encoded index value.Type: ApplicationFiled: May 3, 2023Publication date: December 7, 2023Inventors: Craig Gidney, Ryan Babbush
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Publication number: 20230297864Abstract: Methods, systems, and apparatus for performing phase operations. In one aspect, a method for performing a same phase operation on a first and second qubit using a third qubit prepared in a phased plus state includes: performing a first NOT operation on the third qubit; computing a controlled adder operation on the first, second and third qubit, comprising encoding the result of the controlled adder operation in a fourth qubit; performing a square of the phase operation on the fourth qubit; uncomputing the controlled adder operation on the first, second and third qubit; performing a CNOT operation between the first qubit and the third qubit, wherein the first qubit acts as the control; performing a CNOT operation between the second qubit and the third qubit, wherein the second qubit acts as the control; and performing a second NOT operation on the third qubit.Type: ApplicationFiled: March 9, 2023Publication date: September 21, 2023Inventor: Craig Gidney
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Patent number: 11755942Abstract: Methods, systems and apparatus for producing quantum circuits with low T gate counts. In one aspect, a method for performing a temporary logical AND operation on two control qubits includes the actions of obtaining an ancilla qubit in an A-state; computing a logical-AND of the two control qubits and storing the computed logical-AND in the state of the ancilla qubit, comprising replacing the A-state of the ancilla qubit with the logical-AND of the two control qubits; maintaining the ancilla qubit storing the logical-AND of the two controls until a first condition is satisfied; and erasing the ancilla qubit when the first condition is satisfied.Type: GrantFiled: December 29, 2022Date of Patent: September 12, 2023Assignee: Google LLCInventor: Craig Gidney
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Publication number: 20230281497Abstract: Methods, systems and apparatus for performing windowed quantum arithmetic. In one aspect, a method for performing a product addition operation includes: determining multiple entries of a lookup table, comprising, for each index in a first set of indices, multiplying the index value by a scalar for the product addition operation; for each index in a second set of indices, determining multiple address values, comprising extracting source register values corresponding to indices between i) the index in the second set of indices, and ii) the index in the second set of indices plus the predetermined window size; and adjusting values of a target quantum register based on the determined multiple entries of the lookup table and the determined multiple address values.Type: ApplicationFiled: February 17, 2023Publication date: September 7, 2023Inventor: Craig Gidney
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Publication number: 20230267354Abstract: Methods and apparatus for optimizing a quantum circuit. In one aspect, a method includes identifying one or more sequences of operations in the quantum circuit that un-compute respective qubits on which the quantum circuit operates; generating an adjusted quantum circuit, comprising, for each identified sequence of operations in the quantum circuit, replacing the sequence of operations with an X basis measurement and a classically-controlled phase correction operation, wherein a result of the X basis measurement acts as a control for the classically-controlled correction phase operation; and executing the adjusted quantum circuit.Type: ApplicationFiled: April 20, 2023Publication date: August 24, 2023Inventor: Craig Gidney
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Patent number: 11710063Abstract: Methods and apparatus for piecewise addition into an accumulation register using one or more carry runway registers, where the accumulation register includes a first plurality of qubits with each qubit representing a respective bit of a first binary number and where each carry runway register includes multiple qubits representing a respective binary number. In one aspect, a method includes inserting the one or more carry runway registers into the accumulation register at respective predetermined qubit positions, respectively, of the accumulation register; initializing each qubit of each carry runway register in a plus state; applying one or more subtraction operations to the accumulation register, where each subtraction operation subtracts a state of a respective carry runway register from a corresponding portion of the accumulation register; and adding one or more input binary numbers into the accumulation register using piecewise addition.Type: GrantFiled: October 17, 2022Date of Patent: July 25, 2023Assignee: Google LLCInventor: Craig Gidney
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Patent number: 11675763Abstract: Methods, systems and apparatus for performing indexed operations using a unary iteration quantum circuit. In one aspect, a method includes encoding an index value in an index register comprising index qubits; encoding the index value in a control register comprising multiple control qubits; and repeatedly computing and uncomputing the control qubits to perform, conditioned on the state of the control qubits, the operation on one or more target qubits corresponding to the index value, wherein during the encoding, computing and uncomputing: the multiple control qubits are made available in sequence, and the multiple control qubits correspond to a one-hot encoding of the encoded index value.Type: GrantFiled: April 19, 2019Date of Patent: June 13, 2023Assignee: Google LLCInventors: Craig Gidney, Ryan Babbush
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Publication number: 20230177373Abstract: Methods and apparatus for performing surface code computations using Auto-CCZ states. In one aspect, a method for implementing a delayed choice CZ operation on a first and second data qubit using a quantum computer includes: preparing a first and second routing qubit in a magic state; interacting the first data qubit with the first routing qubit and the second data qubit with the second routing qubit using a first and second CNOT operation, where the first and second data qubits act as controls for the CNOT operations; if a received first classical bit represents an off state: applying a first and second Hadamard gate to the first and second routing qubit; measuring the first and second routing qubit using Z basis measurements to obtain a second and third classical bit; and performing classically controlled fixup operations on the first and second data qubit using the second and third classical bits.Type: ApplicationFiled: January 25, 2023Publication date: June 8, 2023Inventors: Craig Gidney, Austin Greig Fowler
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Publication number: 20230134407Abstract: Methods, systems and apparatus for producing quantum circuits with low T gate counts. In one aspect, a method for performing a temporary logical AND operation on two control qubits includes the actions of obtaining an ancilla qubit in an A-state; computing a logical-AND of the two control qubits and storing the computed logical-AND in the state of the ancilla qubit, comprising replacing the A-state of the ancilla qubit with the logical-AND of the two control qubits; maintaining the ancilla qubit storing the logical-AND of the two controls until a first condition is satisfied; and erasing the ancilla qubit when the first condition is satisfied.Type: ApplicationFiled: December 29, 2022Publication date: May 4, 2023Inventor: Craig Gidney
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Patent number: 11636373Abstract: Methods and apparatus for optimizing a quantum circuit. In one aspect, a method includes identifying one or more sequences of operations in the quantum circuit that un-compute respective qubits on which the quantum circuit operates; generating an adjusted quantum circuit, comprising, for each identified sequence of operations in the quantum circuit, replacing the sequence of operations with an X basis measurement and a classically-controlled phase correction operation, wherein a result of the X basis measurement acts as a control for the classically-controlled correction phase operation; and executing the adjusted quantum circuit.Type: GrantFiled: April 12, 2022Date of Patent: April 25, 2023Assignee: Google LLCInventor: Craig Gidney
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Patent number: 11625637Abstract: Methods, systems, and apparatus for performing phase operations. In one aspect, a method for performing a same phase operation on a first and second qubit using a third qubit prepared in a phased plus state includes: performing a first NOT operation on the third qubit; computing a controlled adder operation on the first, second and third qubit, comprising encoding the result of the controlled adder operation in a fourth qubit; performing a square of the phase operation on the fourth qubit; uncomputing the controlled adder operation on the first, second and third qubit; performing a CNOT operation between the first qubit and the third qubit, wherein the first qubit acts as the control; performing a CNOT operation between the second qubit and the third qubit, wherein the second qubit acts as the control; and performing a second NOT operation on the third qubit.Type: GrantFiled: April 16, 2019Date of Patent: April 11, 2023Assignee: Google LLCInventor: Craig Gidney
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Patent number: 11586969Abstract: Methods, systems and apparatus for performing windowed quantum arithmetic. In one aspect, a method for performing a product addition operation includes: determining multiple entries of a lookup table, comprising, for each index in a first set of indices, multiplying the index value by a scalar for the product addition operation; for each index in a second set of indices, determining multiple address values, comprising extracting source register values corresponding to indices between i) the index in the second set of indices, and ii) the index in the second set of indices plus the predetermined window size; and adjusting values of a target quantum register based on the determined multiple entries of the lookup table and the determined multiple address values.Type: GrantFiled: March 27, 2020Date of Patent: February 21, 2023Assignee: Google LLCInventor: Craig Gidney
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Patent number: 11568298Abstract: Methods and apparatus for performing surface code computations using Auto-CCZ states. In one aspect, a method for implementing a delayed choice CZ operation on a first and second data qubit using a quantum computer includes: preparing a first and second routing qubit in a magic state; interacting the first data qubit with the first routing qubit and the second data qubit with the second routing qubit using a first and second CNOT operation, where the first and second data qubits act as controls for the CNOT operations; if a received first classical bit represents an off state: applying a first and second Hadamard gate to the first and second routing qubit; measuring the first and second routing qubit using Z basis measurements to obtain a second and third classical bit; and performing classically controlled fixup operations on the first and second data qubit using the second and third classical bits.Type: GrantFiled: March 27, 2020Date of Patent: January 31, 2023Assignee: Google LLCInventors: Craig Gidney, Austin Greig Fowler