Abstract: A fault tolerant battery system includes an electrical storage cell having a positive terminal and a negative terminal. The electrical storage cell is provided with a normally open bypass circuit path that is closed in the event of an overdischarged, or open-circuit failure of, the electrical storage cell. The bypass circuit path includes a first electrical conductor connected to the negative terminal of the electrical storage cell, a second electrical conductor connected to the positive terminal of the electrical storage cell, and a shorting gap between the first electrical conductor and the second electrical conductor.

Abstract: A low energy activation, fault tolerant, battery system includes an electrical storage cell having a positive terminal and a negative terminal. The electrical storage cell is provided with a normally open bypass circuit path that is closed in the event of an overdischarged, or open-circuit failure of, the electrical storage cell. The bypass circuit path includes a first electrical conductor connected to the negative terminal of the electrical storage cell, a second electrical conductor connected to the positive terminal of the electrical storage cell, and a shorting gap between the first electrical conductor and the second electrical conductor.

Abstract: A low energy activation, fault tolerant, battery system includes an electrical storage cell having a positive terminal and a negative terminal. The electrical storage cell is provided with a normally open bypass circuit path that is closed in the event of an overdischarged, or open-circuit failure of, the electrical storage cell. The bypass circuit path includes a first electrical conductor connected to the negative terminal of the electrical storage cell, a second electrical conductor connected to the positive terminal of the electrical storage cell, and a shorting gap between the first electrical conductor and the second electrical conductor.

Abstract: A fault tolerant battery system includes an electrical storage cell having a positive terminal and a negative terminal. The electrical storage cell is provided with a normally open bypass circuit path that is closed in the event of an overdischarged, or open-circuit failure of, the electrical storage cell. The bypass circuit path includes a first electrical conductor connected to the negative terminal of the electrical storage cell, a second electrical conductor connected to the positive terminal of the electrical storage cell, and a shorting gap between the first electrical conductor and the second electrical conductor.

Abstract: Apparatuses and methods for optimizing power generation of a solar array are disclosed. The bus voltage is regulated with a regulator controlled through one or more reference signals. When the power bus is being used by electrical systems that are tolerant of a higher variable voltage range, the bus voltage can be temporarily set higher by a commanded reference signal to allow additional solar array power to supply to the power bus. The peak power point may be identified through an established relationship with the solar array performance as a function of temperature, season and/or the age of the solar array. In addition, a reference signal controlled by one or more temperature sensors on the solar array may also modify the bus voltage set-point. Improved solar array power may be extracted from spacecraft beginning-of-life to end-of-life operations due to low insertion loss of a direct energy transfer scheme.

Abstract: Apparatuses and methods for optimizing power generation of a solar array are disclosed. The bus voltage is regulated with a regulator controlled through one or more reference signals. When the power bus is being used by electrical systems that are tolerant of a higher variable voltage range, the bus voltage can be temporarily set higher by a commanded reference signal to allow additional solar array power to supply to the power bus. The peak power point may be identified through an established relationship with the solar array performance as a function of temperature, season and/or the age of the solar array. In addition, a reference signal controlled by one or more temperature sensors on the solar array may also modify the bus voltage set-point. Improved solar array power may be extracted from spacecraft beginning-of-life to end-of-life operations due to low insertion loss of a direct energy transfer scheme.

Abstract: A charging circuit (28) particularly suited for use in a satellite (20) has a battery cell (32). A voltage sensor (36) is coupled to the battery for generating a cell voltage signal. A current sensor (34) is coupled to the battery cell (32) and generates a cell charge current signal. A controller (38) is coupled to the voltage sensor (36) and the current sensor (34). The controller (38) determines a compensated voltage in response to the cell voltage signal and the charge current signal and controls the charging of the battery cell (32) in response to the compensated voltage.

Abstract: A charging circuit (28) particularly suited for use in a satellite (20) has a battery cell (32). A voltage sensor (36) is coupled to the battery for generating a cell voltage signal. A current sensor (34) is coupled to the battery cell (32) and generates a cell charge current signal. A controller (38) is coupled to the voltage sensor (36) and the current sensor (34). The controller (38) determines a compensated voltage in response to the cell voltage signal and the charge current signal and controls the charging of the battery cell (32) in response to the compensated voltage.

Abstract: A power system includes at least two battery cell modules. Each battery cell module has a lithium-ion battery cell, and a battery cell controller operably connected to the lithium-ion battery to control the charging and discharging of the lithium-ion battery cell. A central charge/discharge controller is operably connected to each of the battery cell controllers, allowing the charging and discharging of each lithium-ion battery cell to be individually controlled.

Abstract: A circuit and method are presented for making differential voltage measurements when one or both measurement points are at voltages that exceed those allowed by a typical differential amplifier, and is particular useful for monitoring the individual cell voltages of a number of series-connected cells that make up a rechargeable battery in which some cell voltages must be measured in the presence of a high common mode voltage. Each measurement point is connected to an input of a respective voltage divider, with all the divider outputs connected to a multiplexer having two outputs. The two multiplexer outputs are connected to a differential amplifier. When the voltage dividers are "closely matched," the output of the differential amplifier is directly proportional to the differential voltage between the pair of points to which the dividers are connected, and the differential voltage between those two points is accurately determined.

Abstract: In a satellite experiencing alternate periods of light and eclipse, an electrical power control system utilizing direct energy transfer battery charging in a fully regulated electrical bus system to provide and control the system power over both the charging and the discharging cycles of the satellite electrical system.

Abstract: A single-fault tolerant DC-to-DC converter having an output voltage clamp is capable of sourcing current to and sinking current from a load while maintaining a well regulated secondary bus voltage V.sub.bus. The clamp is disabled when the DC-to-DC converter is sourcing current so that all of the current is delivered to the load and is enabled when V.sub.bus exceeds a clamp set point voltage V.sub.clamp to sink the excess current and clamp V.sub.bus at V.sub.clamp. To provide single fault tolerance, the clamp includes a fault detection clamp element that is controlled by the DC-to-DC converter so that they operate mutually exclusively and a regulator clamp element whose resistance is set in a negative feedback control loop so that, when the fault protection clamp element is activated, both clamp elements sink the excess current and control the secondary bus voltage.