Patents by Inventor Craig H. Huffman

Craig H. Huffman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8574980
    Abstract: A method of forming fully silicided NMOS and PMOS semiconductor devices having independent polysilicon gate thicknesses, and related device. At least some of the illustrative embodiments are methods comprising forming an N-type gate over a semiconductor substrate (the N-type gate having a first thickness), forming a P-type gate over the semiconductor substrate (the P-type gate having a second thickness different than the first thickness), and performing a simultaneous silicidation of the N-type gate and the P-type gate.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: November 5, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Freidoon Mehrad, Shaofeng Yu, Steven A. Vitale, Craig H. Huffman
  • Publication number: 20090321846
    Abstract: A method of forming fully silicided NMOS and PMOS semiconductor devices having independent polysilicon gate thicknesses, and related device. At least some of the illustrative embodiments are methods comprising forming an N-type gate over a semiconductor substrate (the N-type gate having a first thickness), forming a P-type gate over the semiconductor substrate (the P-type gate having a second thickness different than the first thickness), and performing a simultaneous silicidation of the N-type gate and the P-type gate.
    Type: Application
    Filed: September 8, 2009
    Publication date: December 31, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: Freidoon Mehrad, Shaofeng Yu, Steven A. Vitale, Craig H. Huffman
  • Publication number: 20090057776
    Abstract: A method of forming fully silicided NMOS and PMOS semiconductor devices having independent polysilicon gate thicknesses, and related device. At least some of the illustrative embodiments are methods comprising forming an N-type gate over a semiconductor substrate (the N-type gate having a first thickness), forming a P-type gate over the semiconductor substrate (the P-type gate having a second thickness different than the first thickness), and performing a simultaneous silicidation of the N-type gate and the P-type gate.
    Type: Application
    Filed: April 27, 2007
    Publication date: March 5, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Freidoon Mehrad, Shaofeng Yu, Steven A. Vitale, Craig H. Huffman