Patents by Inventor Craig I. Barrack

Craig I. Barrack has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6990529
    Abstract: A frame forwarding and discard architecture in a Differentiated Services network environment. The architecture comprises a discard logic for discarding a frame from a stream of incoming frames of the network environment in accordance with a discard algorithm, the frame being discarded if a predetermined congestion level in the network environment has been reached, and a predetermined backlog limit of a queue associated with the frame, has been reached. Scheduling logic is also provided for scheduling the order in which to transmit one or more enqueued frames of the network environment.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: January 24, 2006
    Assignee: Zarlink Semiconductor V.N., Inc.
    Inventors: Brian Yang, Craig I. Barrack, Linghsiao Wang
  • Patent number: 6954424
    Abstract: A credit-based pacing scheme for heterogeneous speed frame forwarding. A control logic controls the transmission of data between a source device and a destination device in accordance with a handshaking protocol. Pacing logic paces the transmission of the data from the source device to the destination device to prevent congestion in the switching fabric. A credit scheme is used to arbitrate among multiple pacing modules per device, each forwarding data at a different rate.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: October 11, 2005
    Assignee: Zarlink Semiconductor V.N., Inc.
    Inventors: Craig I. Barrack, Brian Yang, John Lam, Rong-Feng Chang
  • Publication number: 20040001494
    Abstract: Architecture for generating a playback time from a AAL2 SSCS voice packet sequence number in a stream-based application. The architecture comprises an event scheduler engine for initiating control parameters for an interpretive window associated with a packet stream; a sliding window engine for controlling the interpretive window according to the control parameters; and an arrival engine that maps the packet sequence number to an expected playback time in accordance with an association created between the packet sequence number and the expected playback time by the interpretive window.
    Type: Application
    Filed: July 1, 2002
    Publication date: January 1, 2004
    Applicant: Zarlink Semiconductor V.N. Inc
    Inventors: Craig I. Barrack, James Yik
  • Publication number: 20030163507
    Abstract: A task-based chip-level hardware architecture. The architecture includes a task manager for managing a task with task information, and a task module operatively connected to the task manager for performing the task in accordance with the task information.
    Type: Application
    Filed: February 26, 2002
    Publication date: August 28, 2003
    Applicant: Zarlink Semiconductor V.N. Inc.
    Inventors: Rong-Feng Chang, Craig I. Barrack, Linghsiao Wang
  • Publication number: 20010051992
    Abstract: A frame forwarding and discard architecture in a Differentiated Services network environment. The architecture comprises a discard logic for discarding a frame from a stream of incoming frames of the network environment in accordance with a discard algorithm, the frame being discarded if a predetermined congestion level in the network environment has been reached, and a predetermined backlog limit of a queue associated with the frame, has been reached. Scheduling logic is also provided for scheduling the order in which to transmit one or more enqueued frames of the network environment.
    Type: Application
    Filed: February 22, 2001
    Publication date: December 13, 2001
    Inventors: Brian Yang, Craig I. Barrack, Linghsiao Wang
  • Publication number: 20010033552
    Abstract: A credit-based pacing scheme for heterogeneous speed frame forwarding. A control logic controls the transmission of data between a source device and a destination device in accordance with a handshaking protocol. Pacing logic paces the transmission of the data from the source device to the destination device to prevent congestion in the switching fabric. A credit scheme is used to arbitrate among multiple pacing modules per device, each forwarding data at a different rate.
    Type: Application
    Filed: February 26, 2001
    Publication date: October 25, 2001
    Inventors: Craig I. Barrack, Brian Yang, John Lam, Rong-Feng Chang