Abstract: A multi-layer semiconductor device includes at least a first semiconductor structure and a second semiconductor structure, each having first and second opposing surfaces. The second semiconductor structure includes a first section and a second section, the second section including a device layer and an insulating layer. The second semiconductor structure also includes one or more conductive structures and one or more interconnect pads. Select ones of the interconnect pads are electrically coupled to select ones of the conductive structures. The multi-layer semiconductor device additionally includes one or more interconnect structures disposed between and coupled to select portions of second surfaces of each of the first and second semiconductor structures. A corresponding method for fabricating a multi-layer semiconductor device is also provided.

Abstract: A semiconductor structure includes at least two substrate layers, each of the at least two substrate layers having first and second opposing surfaces and a plurality of electrical connections extending between the first and second surfaces. The semiconductor structure also includes a substrate joining layer disposed between and coupled to the second surface of a first one of the at least two substrate layers and the first surface of a second one of the at least two substrate layers. The substrate joining layer includes at least one integrated circuit (IC) structure disposed between the first and second surfaces of said substrate joining layer. A corresponding method for fabricating a semiconductor structure is also provided.

Abstract: A multi-layer semiconductor device includes at least two semiconductor structures, each of the at least two semiconductor structures having first and second opposing surfaces and including a first section and a second section. The second section includes a device layer and an insulating layer. The multi-layer semiconductor device also includes one or more conductive structures and one or more interconnect pads. Select ones of the one or more interconnect pads are electrically coupled to the one or more conductive structures. The multi-layer semiconductor device additionally includes a via joining layer disposed between and coupled to second surfaces of each of the at least two semiconductor structures. A corresponding method for fabricating a multi-layer semiconductor device is also provided.

Abstract: A multi-layer semiconductor device includes at least two semiconductor structures, each of the at least two semiconductor structures having first and second opposing surfaces and including a first section and a second section. The second section includes a device layer and an insulating layer. The multi-layer semiconductor device also includes one or more conductive structures and one or more interconnect pads. Select ones of the one or more interconnect pads are electrically coupled to the one or more conductive structures. The multi-layer semiconductor device additionally includes a via joining layer disposed between and coupled to second surfaces of each of the at least two semiconductor structures. A corresponding method for fabricating a multi-layer semiconductor device is also provided.

Abstract: A semiconductor structure includes at least two substrate layers, each of the at least two substrate layers having first and second opposing surfaces and a plurality of electrical connections extending between the first and second surfaces. The semiconductor structure also includes a substrate joining layer disposed between and coupled to the second surface of a first one of the at least two substrate layers and the first surface of a second one of the at least two substrate layers. The substrate joining layer includes at least one integrated circuit (IC) structure disposed between the first and second surfaces of said substrate joining layer. A corres ponding method for fabricating a semiconductor structure is also provided.

Abstract: A multi-layer semiconductor device includes at least a first semiconductor structure and a second semiconductor structure, each having first and second opposing surfaces. The second semiconductor structure includes a first section and a second section, the second section including a device layer and an insulating layer. The second semiconductor structure also includes one or more conductive structures and one or more interconnect pads. Select ones of the interconnect pads are electrically coupled to select ones of the conductive structures. The multi-layer semiconductor device additionally includes one or more interconnect structures disposed between and coupled to select portions of second surfaces of each of the first and second semiconductor structures. A corresponding method for fabricating a multi-layer semiconductor device is also provided.

Abstract: A device includes a device wafer having a circuit component formed thereon and having vias formed therein and a cap wafer bonded to the device wafer. The cap wafer has a cavity therein. The cavity has a post formed therein, and the post is positioned to mechanically support the vias formed in the device wafer. The cavity has a volume, the volume substantially enclosing the circuit component formed on the device wafer. The cavity has a width and height such that an impedance of a transmission line is dependent upon the width and height of the cavity, or the impedance of a transmission line is dependent upon the width of a center conductor within the cavity.

Abstract: A micro-electromechanical system switch includes a substrate and a plurality of actuating electrodes formed the substrate wherein each actuating electrode is activatable. A cantilever beam has a first end and a second end and a plurality of stops formed thereon. The plurality of stops engages the substrate between the plurality of actuating electrode. A contact area is formed in the substrate and located to engage the second end of the cantilever beam. A voltage source applies a voltage to each actuating electrode independently in a sequence from an actuating electrode located adjacent to the first end of the cantilever beam to an actuating electrode located adjacent to the second end of the cantilever beam so that the plurality of stops sequentially engage the substrate between the plurality of actuating electrodes.

Abstract: A device includes a device wafer having a circuit component formed thereon and having vias formed therein and a cap wafer bonded to the device wafer. The cap wafer has a cavity therein. The cavity has a post formed therein, and the post is positioned to mechanically support the vias formed in the device wafer. The cavity has a volume, the volume substantially enclosing the circuit component formed on the device wafer. The cavity has a width and height such that an impedance of a transmission line is dependent upon the width and height of the cavity, or the impedance of a transmission line is dependent upon the width of a center conductor within the cavity.

Abstract: A micro-electromechanical system switch includes a substrate and a plurality of actuating electrodes formed the substrate wherein each actuating electrode is activatable. A cantilever beam has a first end and a second end and a plurality of stops formed thereon. The plurality of stops engages the substrate between the plurality of actuating electrode. A contact area is formed in the substrate and located to engage the second end of the cantilever beam. A voltage source applies a voltage to each actuating electrode independently in a sequence from an actuating electrode located adjacent to the first end of the cantilever beam to an actuating electrode located adjacent to the second end of the cantilever beam so that the plurality of stops sequentially engage the substrate between the plurality of actuating electrodes.

Abstract: A capacitive RF switch and DC RF switch include a fixed electrode having a thin layer of metal and at least one pull-down electrode. A moving plate has a plurality of corrugations and a selective finger design. The capacitive switch includes a selective finger that comes into contact with the fixed electrode so as to minimize the stiction between the moving plate and the fixed electrode when the switch is closed. The DC switch comprises a plurality of dimples that are formed on the selective portion of the moving plate and are positioned to come into contact with the fixed electrode when the switch is closed so as to increase the contact force and lower the resistance between the moving plate and fixed electrode.

Abstract: A mode converter including a silicon waveguide core deposited over a first silicon dioxide cladding layer. The silicon waveguide core is formed such that a first end of the silicon waveguide core has a larger cross-sectional area than a second end of the silicon waveguide core. The silicon waveguide core may include a vertical taper and/or a lateral taper.

Abstract: An apparatus for optical coupling between optical fibers and semiconductor waveguides and method of use thereof. The optical coupler comprises a tapered semiconductor structure having a cross section defined in a plane substantially perpendicular to a direction of propagation of light, which cross section has a dimension accurate to approximately 50 nanometer tolerance. The coupler has an optical index of refraction. The coupler has adjacent thereto material having an optical index less than that of the semiconductor, the adjacent material confining light within the semiconductor structure. In an exemplary embodiment, an optical communication device has two optical couplers disposed one at each end of a semiconductor waveguide to convey an optical communication from a source at one end to receiver at the other. In a further exemplary embodiment, a plurality of optical communication devices are disposed on a single semiconductor substrate.