Patents by Inventor Craig McLachlan

Craig McLachlan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8815641
    Abstract: A method and structure for a semiconductor device including a thin nitride layer formed between a diamond SOI layer and device silicon layer to block diffusion of ions and improve lifetime of the device silicon.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: August 26, 2014
    Assignee: Soitec
    Inventors: Rick C. Jerome, Francois Hebert, Craig McLachlan, Kevin Hoopingarner
  • Patent number: 8691670
    Abstract: A method and structure for a semiconductor device, the device including a handle wafer, a diamond layer formed directly on a front side of the handle wafer, and a thick oxide layer formed directly on a back side of the handle wafer, the oxide layer of a thickness to counteract tensile stresses of the diamond layer. Nitride layers are formed on outer surfaces of the diamond layer and thick oxide layer and a polysilicon is formed on outer surfaces of the nitride layers. A device wafer is bonded to the handle wafer to form the semiconductor device.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: April 8, 2014
    Assignee: Soitec
    Inventors: Rick Carlton Jerome, Francois Hebert, Craig McLachlan, Kevin Hoopingarner
  • Patent number: 8476150
    Abstract: A method and structure for a semiconductor device, the device including a handle wafer, a diamond layer formed directly on a front side of the handle wafer, and a thick oxide layer formed directly on a back side of the handle wafer, the oxide of a thickness to counteract tensile stresses of the diamond layer. Nitride layers are formed on the outer surfaces of the diamond layer and thick oxide layer and a polysilicon is formed on outer surfaces of the nitride layers. A device wafer is bonded to the handle wafer to form the semiconductor device.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: July 2, 2013
    Assignee: Intersil Americas Inc.
    Inventors: Rick C. Jerome, Francois Hebert, Craig McLachlan, Kevin Hoopingarner
  • Publication number: 20110186840
    Abstract: A method and structure for a semiconductor device including a thin nitride layer formed between a diamond SOI layer and device silicon layer to block diffusion of ions and improve lifetime of the device silicon.
    Type: Application
    Filed: March 9, 2010
    Publication date: August 4, 2011
    Inventors: Rick C. Jerome, Francois Hebert, Craig McLachlan, Kevin Hoopingarner
  • Publication number: 20110186959
    Abstract: A method and structure for a semiconductor device, the device including a handle wafer, a diamond layer formed directly on a front side of the handle wafer, and a thick oxide layer formed directly on a back side of the handle wafer, the oxide of a thickness to counteract tensile stresses of the diamond layer. Nitride layers are formed on the outer surfaces of the diamond layer and thick oxide layer and a polysilicon is formed on outer surfaces of the nitride layers. A device wafer is bonded to the handle wafer to form the semiconductor device.
    Type: Application
    Filed: September 22, 2010
    Publication date: August 4, 2011
    Inventors: Rick C. Jerome, Francois Hebert, Craig McLachlan, Kevin Hoopingarner
  • Publication number: 20070056595
    Abstract: A method for treating ischaemic tissue comprising cutting the tissue to form a wound, and locating a sponge-like element (1) structured to receive blood and to comply with the movement of the tissue, in contact with a source of blood whereby the element (1) receives blood from the source of blood to thereby promote tissue growth and angiogenesis throughout and beyond the element (1).
    Type: Application
    Filed: November 3, 2003
    Publication date: March 15, 2007
    Inventor: Craig McLachlan
  • Publication number: 20070059345
    Abstract: A method for promoting or stimulating growth of tissue (22) comprising providing an element (23) which is adapted to receive blood, locating the element (23) in contact with the tissue (23) with at least one portion of the element (23) extending away from an external surface of the tissue (22), and conditioning the element (23) by introducing blood into said at least one portion whereby, when located in contact with the tissue, the conditioned element (23) is arranged to stimulate or promote growth of tissue in (27) and from (28) the at least one portion.
    Type: Application
    Filed: April 23, 2004
    Publication date: March 15, 2007
    Inventor: Craig McLachlan
  • Patent number: 6236083
    Abstract: A method for fabricating a field effect transistor using the supporting substrate as a device layer in accordance with the present invention comprises several steps. To fabricate the field effect transistor, an epitaxial layer is grown on one surface of a substrate having an opposing surface, the epitaxial layer forming a drain for the transistor. Once the epitaxial layer is grown, the substrate is thinned to an appropriate device thickness and then a gate and a source for the transistor are formed on the opposing surface of the substrate. In an alternative embodiment, a polysilicon layer is used instead of the epitaxial layer. A field effect transistor fabricated from the method described above includes an epitaxial layer formed on one surface of a substrate having an opposing surface, the epitaxial layer forming a drain for the transistor and a gate and a source for the transistor formed on the other surface of the substrate.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: May 22, 2001
    Assignee: Intersil Corporation
    Inventor: Craig McLachlan
  • Patent number: 6078077
    Abstract: A method for fabricating a field effect transistor using the supporting substrate as a device layer in accordance with the present invention comprises several steps. To fabricate the field effect transistor, an epitaxial layer is grown on one surface of a substrate having an opposing surface, the epitaxial layer forming a drain for the transistor. Once the epitaxial layer is grown, the substrate is thinned to an appropriate device thickness and then a gate and a source for the transistor are formed on the opposing surface of the substrate. In an alternative embodiment, a polysilicon layer is used instead of the epitaxial layer. A field effect transistor fabricated from the method described above includes an epitaxial layer formed on one surface of a substrate having an opposing surface, the epitaxial layer forming a drain for the transistor and a gate and a source for the transistor formed on the other surface of the substrate.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: June 20, 2000
    Assignee: Intersil Corporation
    Inventor: Craig McLachlan
  • Patent number: 5913130
    Abstract: A method for fabricating a field effect transistor using the supporting substrate as a device layer in accordance with the present invention comprises several steps. To fabricate the field effect transistor, an epitaxial layer is grown on one surface of a substrate having an opposing surface, the epitaxial layer forming a drain for the transistor. Once the epitaxial layer is grown, the substrate is thinned to an appropriate device thickness and then a gate and a source for the transistor are formed on the opposing surface of the substrate. In an alternative embodiment, a polysilicon layer is used instead of the epitaxial layer. A field effect transistor fabricated from the method described above includes an epitaxial layer formed on one surface of a substrate having an opposing surface, the epitaxial layer forming a drain for the transistor and a gate and a source for the transistor formed on the other surface of the substrate.
    Type: Grant
    Filed: June 12, 1996
    Date of Patent: June 15, 1999
    Assignee: Harris Corporation
    Inventor: Craig McLachlan