Patents by Inventor Craig Michael Horn
Craig Michael Horn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230062016Abstract: A self-authenticating chip includes first and second memory regions storing, respectively, first and second authentication codes. The second memory region is adapted to be unreadable and unmodifiable by the chip or a chip reader. The chip also includes a comparator for providing an indicator of whether given input matches the second authentication code. The chip also includes an authentication circuit that is operable to read the first authentication code from the first memory region, present the first authentication code to the comparator, and in response to receiving an indicator from the comparator indicating that the first and second authentication codes match, unlock at least one of (i) a communication interface of the chip to allow data to be transmitted therethrough to a chip reader and (ii) a third memory region of the chip to allow data to be read therefrom.Type: ApplicationFiled: April 18, 2022Publication date: March 2, 2023Inventors: DENNIS BERNARD VAN KERREBROECK, CRAIG MICHAEL HORN, BERNARD MARIE-ANDRE VAN KERREBROECK
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Patent number: 11336642Abstract: A self-authenticating chip includes first and second memory regions storing, respectively, first and second authentication codes. The second memory region is adapted to be unreadable and unmodifiable by the chip or a chip reader. The chip also includes a comparator for providing an indicator of whether given input matches the second authentication code. The chip also includes an authentication circuit that is operable to read the first authentication code from the first memory region, present the first authentication code to the comparator, and in response to receiving an indicator from the comparator indicating that the first and second authentication codes match, unlock at least one of (i) a communication interface of the chip to allow data to be transmitted therethrough to a chip reader and (ii) a third memory region of the chip to allow data to be read therefrom.Type: GrantFiled: April 9, 2020Date of Patent: May 17, 2022Assignee: CARDEX SYSTEMS INC.Inventors: Dennis Bernard Van Kerrebroeck, Craig Michael Horn, Bernard Marie-Andre Van Kerrebroeck
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Publication number: 20210058389Abstract: A self-authenticating chip includes first and second memory regions storing, respectively, first and second authentication codes. The second memory region is adapted to be unreadable and unmodifiable by the chip or a chip reader. The chip also includes a comparator for providing an indicator of whether given input matches the second authentication code. The chip also includes an authentication circuit that is operable to read the first authentication code from the first memory region, present the first authentication code to the comparator, and in response to receiving an indicator from the comparator indicating that the first and second authentication codes match, unlock at least one of (i) a communication interface of the chip to allow data to be transmitted therethrough to a chip reader and (ii) a third memory region of the chip to allow data to be read therefrom.Type: ApplicationFiled: April 9, 2020Publication date: February 25, 2021Inventors: DENNIS BERNARD VAN KERREBROECK, CRAIG MICHAEL HORN, BERNARD MARIE-ANDRE VAN KERREBROECK
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Patent number: 10659455Abstract: A self-authenticating chip includes first and second memory regions storing, respectively, first and second authentication codes. The second memory region is adapted to be unreadable and unmodifiable by the chip or a chip reader. The chip also includes a comparator for providing an indicator of whether given input matches the second authentication code. The chip also includes an authentication circuit that is operable to read the first authentication code from the first memory region, present the first authentication code to the comparator, and in response to receiving an indicator from the comparator indicating that the first and second authentication codes match, unlock at least one of (i) a communication interface of the chip to allow data to be transmitted therethrough to a chip reader and (ii) a third memory region of the chip to allow data to be read therefrom.Type: GrantFiled: October 15, 2018Date of Patent: May 19, 2020Assignee: CARDEX SYSTEMS INC.Inventors: Dennis Bernard Van Kerrebroeck, Craig Michael Horn, Bernard Marie-Andre Van Kerrebroeck
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Publication number: 20190260738Abstract: A self-authenticating chip includes first and second memory regions storing, respectively, first and second authentication codes. The second memory region is adapted to be unreadable and unmodifiable by the chip or a chip reader. The chip also includes a comparator for providing an indicator of whether given input matches the second authentication code. The chip also includes an authentication circuit that is operable to read the first authentication code from the first memory region, present the first authentication code to the comparator, and in response to receiving an indicator from the comparator indicating that the first and second authentication codes match, unlock at least one of (i) a communication interface of the chip to allow data to be transmitted therethrough to a chip reader and (ii) a third memory region of the chip to allow data to be read therefrom.Type: ApplicationFiled: October 15, 2018Publication date: August 22, 2019Inventors: DENNIS BERNARD VAN KERREBROECK, CRAIG MICHAEL HORN, BERNARD MARIE-ANDRE VAN KERREBROECK
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Patent number: 10135814Abstract: A self-authenticating chip includes first and second memory regions storing, respectively, first and second authentication codes. The second memory region is adapted to be unreadable and unmodifiable by the chip or a chip reader. The chip also includes a comparator for providing an indicator of whether given input matches the second authentication code. The chip also includes an authentication circuit that is operable to read the first authentication code from the first memory region, present the first authentication code to the comparator, and in response to receiving an indicator from the comparator indicating that the first and second authentication codes match, unlock at least one of (i) a communication interface of the chip to allow data to be transmitted therethrough to a chip reader and (ii) a third memory region of the chip to allow data to be read therefrom.Type: GrantFiled: December 16, 2016Date of Patent: November 20, 2018Assignee: CARDEX SYSTEMS INCInventors: Dennis Bernard Van Kerrebroeck, Craig Michael Horn, Bernard Marie-Andre Van Kerrebroeck
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Publication number: 20170104751Abstract: A self-authenticating chip includes first and second memory regions storing, respectively, first and second authentication codes. The second memory region is adapted to be unreadable and unmodifiable by the chip or a chip reader. The chip also includes a comparator for providing an indicator of whether given input matches the second authentication code. The chip also includes an authentication circuit that is operable to read the first authentication code from the first memory region, present the first authentication code to the comparator, and in response to receiving an indicator from the comparator indicating that the first and second authentication codes match, unlock at least one of (i) a communication interface of the chip to allow data to be transmitted therethrough to a chip reader and (ii) a third memory region of the chip to allow data to be read therefrom.Type: ApplicationFiled: December 16, 2016Publication date: April 13, 2017Inventors: Dennis Bernard Van Kerrebroeck, Craig Michael Horn, Bernard Marie-Andre Van Kerrebroeck
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Patent number: 9590983Abstract: A self-authenticating chip includes first and second memory regions storing, respectively, first and second authentication codes. The second memory region is adapted to be unreadable and unmodifiable by the chip or a chip reader. The chip also includes a comparator for providing an indicator of whether given input matches the second authentication code. The chip also includes an authentication circuit that is operable to read the first authentication code from the first memory region, present the first authentication code to the comparator, and in response to receiving an indicator from the comparator indicating that the first and second authentication codes match, unlock at least one of (i) a communication interface of the chip to allow data to be transmitted therethrough to a chip reader and (ii) a third memory region of the chip to allow data to be read therefrom.Type: GrantFiled: April 9, 2014Date of Patent: March 7, 2017Assignee: Cardex Systems Inc.Inventors: Dennis Bernard Van Kerrebroeck, Craig Michael Horn, Bernard Marie-Andre Van Kerrebroeck
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Publication number: 20150295919Abstract: A self-authenticating card includes a magnetic stripe storing a card authentication code and a network authentication code. The card also includes an authentication circuit that is operable to read the card authentication code and the network authentication code from the magnetic stripe using at least one sensor and authenticate the card using the card authentication code by comparing the card authentication code with an expected code stored in memory separate from the magnetic stripe. In response to authenticating the card using the card authentication code, the authentication circuit enables data communication with a card reader, provides the network authentication code to the card reader, generates a new network authentication code, and writes the new network authentication code to the magnetic stripe using at least one write head.Type: ApplicationFiled: April 9, 2014Publication date: October 15, 2015Applicant: DE SONNEVILLE INTERNATIONAL LTD.Inventors: Dennis Bernard Van Kerrebroeck, Craig Michael Horn
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Publication number: 20150295920Abstract: A self-authenticating chip includes first and second memory regions storing, respectively, first and second authentication codes. The second memory region is adapted to be unreadable and unmodifiable by the chip or a chip reader. The chip also includes a comparator for providing an indicator of whether given input matches the second authentication code. The chip also includes an authentication circuit that is operable to read the first authentication code from the first memory region, present the first authentication code to the comparator, and in response to receiving an indicator from the comparator indicating that the first and second authentication codes match, unlock at least one of (i) a communication interface of the chip to allow data to be transmitted therethrough to a chip reader and (ii) a third memory region of the chip to allow data to be read therefrom.Type: ApplicationFiled: April 9, 2014Publication date: October 15, 2015Applicant: DE SONNEVILLE INTERNATIONAL LTD.Inventors: Dennis Bernard Van Kerrebroeck, Craig Michael Horn, Bernard Marie-Andre VAN KERREBROECK