Abstract: Methods for forming electronic assemblies are provided. A device substrate having a plurality of electronic components embedded therein is provided. The device substrate is attached to a carrier substrate using an adhesive material. A plurality of cuts are formed through the device substrate to divide the device substrate into a plurality of portions. Each of the plurality of portions includes at least one of the electronic components. A force is applied to each of the plurality of portions in a direction away from the carrier substrate to remove the plurality of portions from the carrier substrate.

Abstract: A method (32) of packaging integrated circuit (IC) dies (48) includes applying (36) a laminating material (44) to a wafer (40), and separating (46) the wafer (40) into multiple IC dies (48) such that the laminating material (44) is applied to back surfaces (52) of the IC dies (48). Each of the IC dies (48) is positioned (62) with an active surface (50) facing a support substrate (56). An encapsulant layer (72) is formed (64) overlying the laminating material (44) and the back surfaces (52) of the IC dies (48) from a molding compound (66). The molding compound (66) and the laminating material (44) are removed from the back surfaces (52) of the IC dies (48) to form (76) openings (78) exposing the back surfaces (52). Conductive material (84, 88) is placed in the openings (78) and functions as a heat sink and/or a ground for the IC dies (48).

Abstract: Methods for forming electronic assemblies are provided. A device substrate having a plurality of electronic components embedded therein is provided. The device substrate is attached to a carrier substrate using an adhesive material. A plurality of cuts are formed through the device substrate to divide the device substrate into a plurality of portions. Each of the plurality of portions includes at least one of the electronic components. A force is applied to each of the plurality of portions in a direction away from the carrier substrate to remove the plurality of portions from the carrier substrate.

Abstract: An assembly for producing partially packaged semiconductor devices is provided. In one embodiment, the assembly includes a magnetic plate; a flexible substrate disposed adjacent the magnetic plate and having two surfaces; a nonstick coating disposed on one surface of the flexible substrate thereby exposing a nonstick surface; and a tape layer having two surfaces. The tape layer is adhesively attached to the nonstick surface to expose a surface of the tape layer. A frame is disposed on the exposed surface of the tape layer, and a plurality of integrated circuit (IC) die is positioned within the frame and supported by the tape layer. A panel is formed within the frame that at least partially surrounds the plurality of IC die and that contacts the tape layer.

Abstract: A method is described for manufacturing electronic assemblies (52). Electronic die (36) held in a plastic matrix (43) form a partially completed panel (35) of electronic assemblies (52). The panel (35) is adhesively mounted to a ceramic carrier (20) having multiple holes (22) there through. Conductive interconnects (38-1, 38-2, etc.) and other layers are applied to the panel, coupled to electrical contacts on the die (36) and external electrical contacts (39-1) for the panel (50). The panel (50) and the carrier (20) are separated and the panel singulated to release the finished electronic assemblies (52). Silicone is a preferred adhesive (27) and is dissolved using a non-polar solvent (70) that penetrates through the holes (22) in the carrier (20) to the adhesive (27). The adhesive (27) is preferentially applied using a transfer adhesive sandwich (24), that is, an adhesive layer (27) with removable plastic sheets (25, 26) on either side that can be peeled away from the adhesive (27).

Abstract: Integrated circuit packages are formed from a panel where the panel is separated by laser cutting the panel. In some embodiments, the panel is attached to the carrier for the formation of interconnect layers on the panel. Afterwards, the panel is cut with a laser while on the carrier to separate the integrated circuit packages. A tape or other type of structure may be attached to the top of the packages after the laser cutting. The integrated circuit packages are removed from the carrier by releasing the adhesive and removing the integrated circuit packages with the tape. The packages are then removed from the tape.

Abstract: Integrated circuit packages are formed from a panel where the panel is separated by laser cutting the panel. In some embodiments, the panel is attached to the carrier for the formation of interconnect layers on the panel. Afterwards, the panel is cut with a laser while on the carrier to separate the integrated circuit packages. A tape or other type of structure may be attached to the top of the packages after the laser cutting. The integrated circuit packages are removed from the carrier by releasing the adhesive and removing the integrated circuit packages with the tape. The packages are then removed from the tape.

Abstract: A method (32) of packaging integrated circuit (IC) dies (48) includes applying (36) a laminating material (44) to a wafer (40), and separating (46) the wafer (40) into multiple IC dies (48) such that the laminating material (44) is applied to back surfaces (52) of the IC dies (48). Each of the IC dies (48) is positioned (62) with an active surface (50) facing a support substrate (56). An encapsulant layer (72) is formed (64) overlying the laminating material (44) and the back surfaces (52) of the IC dies (48) from a molding compound (66). The molding compound (66) and the laminating material (44) are removed from the back surfaces (52) of the IC dies (48) to form (76) openings (78) exposing the back surfaces (52). Conductive material (84, 88) is placed in the openings (78) and functions as a heat sink and/or a ground for the IC dies (48).

Abstract: A method is described for manufacturing electronic assemblies (52). Electronic die (36) held in a plastic matrix (43) form a partially completed panel (35) of electronic assemblies (52). The panel (35) is adhesively mounted to a ceramic carrier (20) having multiple holes (22) there through. Conductive interconnects (38-1, 38-2, etc.) and other layers are applied to the panel, coupled to electrical contacts on the die (36) and external electrical contacts (39-1) for the panel (50). The panel (50) and the carrier (20) are separated and the panel singulated to release the finished electronic assemblies (52). Silicone is a preferred adhesive (27) and is dissolved using a non-polar solvent (70) that penetrates through the holes (22) in the carrier (20) to the adhesive (27). The adhesive (27) is preferentially applied using a transfer adhesive sandwich (24), that is, an adhesive layer (27) with removable plastic sheets (25, 26) on either side that can be peeled away from the adhesive (27).

Abstract: An assembly for producing partially packaged semiconductor devices is provided. In one embodiment, the assembly includes a magnetic plate; a flexible substrate disposed adjacent the magnetic plate and having two surfaces; a nonstick coating disposed on one surface of the flexible substrate thereby exposing a nonstick surface; and a tape layer having two surfaces. The tape layer is adhesively attached to the nonstick surface to expose a surface of the tape layer. A frame is disposed on the exposed surface of the tape layer, and a plurality of integrated circuit (IC) die is positioned within the frame and supported by the tape layer. A panel is formed within the frame that at least partially surrounds the plurality of IC die and that contacts the tape layer.

Abstract: Methods and apparatus are provided for use in manufacturing a device packaging comprising the steps of: positioning a metal substrate such as spring steel on a magnetic plate so as to expose a surface of the metal substrate; placing a first tape layer on the exposed surface of a metal substrate so as to expose a nonstick surface of the first tape layer such as PTFE; placing a second tape layer on the exposed surface of the first tape layer so as to expose a surface of the second tape layer; positioning a mold frame on the exposed surface of the second tape layer; positioning a die within the mold frame; depositing epoxy within the mold frame; curing the epoxy so as to create a molded panel; removing the mold frame; grinding the molded panel to a desired thickness; separating the first tape layer from the second tape layer so as to separate the metal substrate from the molded panel; and peeling the second tape layer from the molded panel.

Abstract: A method for forming a microelectronic assembly is provided. A carrier substrate (30) is provided. A sacrificial layer (38) is formed over the carrier substrate. A polymeric layer (40), including a polymeric tape (42) and a polymeric layer adhesive (44), is formed over the sacrificial layer. The polymeric layer adhesive is between the sacrificial layer and the polymeric tape. A microelectronic die (52), having an integrated circuit formed therein, is placed on the polymeric layer. The microelectronic die is encapsulated with an encapsulation material (54) to form an encapsulated structure (58). The polymeric layer and the encapsulated structure are separated from the carrier substrate. The separating of the polymeric layer and the encapsulated structure includes at least partially deteriorating the sacrificial layer.

Abstract: A multi-layer structure (102) includes a first build-up layer structure (202) configured to connect to a heat-generating module (120), a second build-up layer structure (206) configured to connect to a substrate, and a middle layer (204) provided between the first build-up layer structure and the second build-up layer structure, the middle layer including at least one semiconductor component (110) and a heat spreader (130). A first set of thermal vias (210) extend through the first build-up layer structure to the heat spreader, and a second set of thermal vias (2100 extend through the second build-up layer structure to the heat spreader, wherein at least a portion of the first set of thermal vias is in thermal contact with the heat-generating module.

Abstract: A multi-layer structure (102) includes a first build-up layer structure (202) configured to connect to a heat-generating module (120), a second build-up layer structure (206) configured to connect to a substrate, and a middle layer (204) provided between the first build-up layer structure and the second build-up layer structure, the middle layer including at least one semiconductor component (110) and a heat spreader (130). A first set of thermal vias (210) extend through the first build-up layer structure to the heat spreader, and a second set of thermal vias (2100 extend through the second build-up layer structure to the heat spreader, wherein at least a portion of the first set of thermal vias is in thermal contact with the heat-generating module.

Abstract: A process for encapsulating an integrated circuit die (403) using a porous carrier (101). In one example, an adhesive structure (e.g. tape) is applied to a porous carrier. Integrated circuit die is then placed on the adhesive structure. The integrated circuit die is then encapsulated to form an encapsulated structure (505). The carrier is then subjected to a solvent that passes through the carrier to reduce the adhesive strength of the adhesive structure for removal of the carrier from the encapsulated structure.