Patents by Inventor Craig S. APPEL

Craig S. APPEL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240421772
    Abstract: Embodiments provide for a tunable driving circuit by monitoring a frequency of a ring oscillator of an electrical integrated circuit connected to an optical modulator to determine operational characteristics of the electrical integrated circuit; setting, based on the operational characteristics, a driving voltage for a plurality of tunable inverters and a plurality of fixed gain inverters that control the optical modulator, wherein each tunable inverter of the plurality of tunable inverters is connected in parallel with a corresponding fixed gain inverter of the plurality of fixed gain inverters on one of a first arm and a second arm connected to the optical modulator; and setting an amplification strength for the plurality of tunable inverters based on the operational characteristics.
    Type: Application
    Filed: August 23, 2024
    Publication date: December 19, 2024
    Inventors: Craig S. APPEL, Peter C. METZ, Joseph V. PAMPANIN, Sanjay SUNDER
  • Patent number: 12095421
    Abstract: Embodiments provide for a tunable driving circuit by monitoring a frequency of a ring oscillator of an electrical integrated circuit connected to an optical modulator to determine operational characteristics of the electrical integrated circuit; setting, based on the operational characteristics, a driving voltage for a plurality of tunable inverters and a plurality of fixed gain inverters that control the optical modulator, wherein each tunable inverter of the plurality of tunable inverters is connected in parallel with a corresponding fixed gain inverter of the plurality of fixed gain inverters on one of a first arm and a second arm connected to the optical modulator; and setting an amplification strength for the plurality of tunable inverters based on the operational characteristics.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: September 17, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Craig S. Appel, Peter C. Metz, Joseph V. Pampanin, Sanjay Sunder
  • Patent number: 11947239
    Abstract: The present disclosure provide for active boost in an electrical driver via a frequency comparator, configured to determine operational characteristics of an electrical circuit connected to an optical modulator based on a frequency difference between a ring oscillator and the clock signal; an electrical driver configured to drive a phase shift of a first optical signal carried on a first arm relative to a second optical signal carried on a second arm of an optical modulator, the electrical driver comprising: a first signal pathway, connected to the first arm of the optical modulator, wherein the first signal pathway includes: an adjustable gain inverter, electrically connected to first and second nodes; a fixed gain inverter, electrically connected to the first and second nodes; an inductor electrically connected between the second node and a third node; and a non-inverting amplifier connected between the third node and the first node.
    Type: Grant
    Filed: August 18, 2022
    Date of Patent: April 2, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Craig S. Appel, Peter C. Metz
  • Patent number: 11810877
    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: November 7, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Mark A. Webster, Craig S. Appel
  • Patent number: 11639955
    Abstract: The fault detection system described provides an efficient method to test and monitor component to component connectivity in an electronic package using on chip test circuits and on chip components, which reduces the need for external testing equipment and analysis. The on chip nature allows for both real time testing in the assembly process of the electronic packages and during use of the electronic package by determining an on chip reference measurement and using the reference measurement to determine an operational status of the package.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: May 2, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Sanjay Sunder, Prajwal M. Kasturi, Joseph V. Pampanin, Craig S. Appel
  • Publication number: 20220390807
    Abstract: The present disclosure provide for active boost in an electrical driver via a frequency comparator, configured to determine operational characteristics of an electrical circuit connected to an optical modulator based on a frequency difference between a ring oscillator and the clock signal; an electrical driver configured to drive a phase shift of a first optical signal carried on a first arm relative to a second optical signal carried on a second arm of an optical modulator, the electrical driver comprising: a first signal pathway, connected to the first arm of the optical modulator, wherein the first signal pathway includes: an adjustable gain inverter, electrically connected to first and second nodes; a fixed gain inverter, electrically connected to the first and second nodes; an inductor electrically connected between the second node and a third node; and a non-inverting amplifier connected between the third node and the first node.
    Type: Application
    Filed: August 18, 2022
    Publication date: December 8, 2022
    Inventors: Craig S. APPEL, Peter C. METZ
  • Publication number: 20220337194
    Abstract: Embodiments provide for a tunable driving circuit by monitoring a frequency of a ring oscillator of an electrical integrated circuit connected to an optical modulator to determine operational characteristics of the electrical integrated circuit; setting, based on the operational characteristics, a driving voltage for a plurality of tunable inverters and a plurality of fixed gain inverters that control the optical modulator, wherein each tunable inverter of the plurality of tunable inverters is connected in parallel with a corresponding fixed gain inverter of the plurality of fixed gain inverters on one of a first arm and a second arm connected to the optical modulator; and setting an amplification strength for the plurality of tunable inverters based on the operational characteristics.
    Type: Application
    Filed: July 5, 2022
    Publication date: October 20, 2022
    Inventors: Craig S. APPEL, Peter C. METZ, Joseph V. PAMPANIN, Sanjay SUNDER
  • Patent number: 11454856
    Abstract: The present disclosure provide for active boost in an electrical driver via a frequency comparator, configured to determine operational characteristics of an electrical circuit connected to an optical modulator based on a frequency difference between a ring oscillator and the clock signal; an electrical driver configured to drive a phase shift of a first optical signal carried on a first arm relative to a second optical signal carried on a second arm of an optical modulator, the electrical driver comprising: a first signal pathway, connected to the first arm of the optical modulator, wherein the first signal pathway includes: an adjustable gain inverter, electrically connected to first and second nodes; a fixed gain inverter, electrically connected to the first and second nodes; an inductor electrically connected between the second node and a third node; and a non-inverting amplifier connected between the third node and the first node.
    Type: Grant
    Filed: January 18, 2020
    Date of Patent: September 27, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Craig S. Appel, Peter C. Metz
  • Patent number: 11411538
    Abstract: Embodiments provide for a tunable driving circuit by monitoring a frequency of a ring oscillator of an electrical integrated circuit connected to an optical modulator to determine operational characteristics of the electrical integrated circuit; setting, based on the operational characteristics, a driving voltage for a plurality of tunable inverters and a plurality of fixed gain inverters that control the optical modulator, wherein each tunable inverter of the plurality of tunable inverters is connected in parallel with a corresponding fixed gain inverter of the plurality of fixed gain inverters on one of a first arm and a second arm connected to the optical modulator; and setting an amplification strength for the plurality of tunable inverters based on the operational characteristics.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: August 9, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Craig S. Appel, Peter C. Metz, Joseph V. Pampanin, Sanjay Sunder
  • Publication number: 20220077084
    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
    Type: Application
    Filed: November 15, 2021
    Publication date: March 10, 2022
    Inventors: Vipulkumar K. PATEL, Mark A. WEBSTER, Craig S. APPEL
  • Patent number: 11227847
    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: January 18, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Mark A. Webster, Craig S. Appel
  • Publication number: 20210382106
    Abstract: The fault detection system described provides an efficient method to test and monitor component to component connectivity in an electronic package using on chip test circuits and on chip components, which reduces the need for external testing equipment and analysis. The on chip nature allows for both real time testing in the assembly process of the electronic packages and during use of the electronic package by determining an on chip reference measurement and using the reference measurement to determine an operational status of the package.
    Type: Application
    Filed: August 23, 2021
    Publication date: December 9, 2021
    Inventors: Sanjay SUNDER, Prajwal M. KASTURI, Joseph V. PAMPANIN, Craig S. APPEL
  • Publication number: 20210278589
    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
    Type: Application
    Filed: March 4, 2020
    Publication date: September 9, 2021
    Inventors: Vipulkumar K. PATEL, Mark A. WEBSTER, Craig S. APPEL
  • Patent number: 11099229
    Abstract: The fault detection system described provides an efficient method to test and monitor component to component connectivity in an electronic package using on chip test circuits and on chip components, which reduces the need for external testing equipment and analysis. The on chip nature allows for both real time testing in the assembly process of the electronic packages and during use of the electronic package by determining an on chip reference measurement and using the reference measurement to determine an operational status of the package.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: August 24, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Sanjay Sunder, Prajwal M. Kasturi, Joseph V. Pampanin, Craig S. Appel
  • Publication number: 20210223659
    Abstract: The present disclosure provide for active boost in an electrical driver via a frequency comparator, configured to determine operational characteristics of an electrical circuit connected to an optical modulator based on a frequency difference between a ring oscillator and the clock signal; an electrical driver configured to drive a phase shift of a first optical signal carried on a first arm relative to a second optical signal carried on a second arm of an optical modulator, the electrical driver comprising: a first signal pathway, connected to the first arm of the optical modulator, wherein the first signal pathway includes: an adjustable gain inverter, electrically connected to first and second nodes; a fixed gain inverter, electrically connected to the first and second nodes; an inductor electrically connected between the second node and a third node; and a non-inverting amplifier connected between the third node and the first node.
    Type: Application
    Filed: January 18, 2020
    Publication date: July 22, 2021
    Inventors: Craig S. APPEL, Peter C. METZ
  • Publication number: 20210215754
    Abstract: The fault detection system described provides an efficient method to test and monitor component to component connectivity in an electronic package using on chip test circuits and on chip components, which reduces the need for external testing equipment and analysis. The on chip nature allows for both real time testing in the assembly process of the electronic packages and during use of the electronic package by determining an on chip reference measurement and using the reference measurement to determine an operational status of the package.
    Type: Application
    Filed: January 10, 2020
    Publication date: July 15, 2021
    Applicants: Cisco Technology, Inc., Cisco Technology, Inc.
    Inventors: Sanjay Sunder, Prajwal M. Kasturi, Joseph V. Pampanin, Craig S. Appel
  • Patent number: 10965377
    Abstract: Thermal tuning and quadrature control of opto-electronic devices using active extinction ratio tracking is proved by phase shifting, via a first phase shifter, a first optical signal carried on a first arm of an interferometer relative to a second optical signal carried on a second arm of the interferometer; combining the first optical signal with the second optical signal as an output signal; detecting a peak value in the output signal; and adjusting a relative phase offset imparted by the first phase shifter on the first optical signal relative to the second optical signal, based on the peak value, to increase an amplitude of the peak value. In various embodiments, the peak value is increased over time to maximize an extinction ratio of the optoelectronic device and maintain the extinction ratio in a maximized state during operation.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: March 30, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Craig S. Appel, Romesh Kumar Nandwana, Sanjay Sunder, Kadaba Lakshmikumar
  • Patent number: 10880014
    Abstract: Active relative intensity noise mitigation in nested interferometers using trans-impedance amplifiers is provided by splitting an optical carrier signal into a first version and a second version, wherein the first version is orthogonal to the second version; re-combining predefined portions of the first version and the second version to determine a noise level; modulating at least one of the first version and the second version based on the noise level to reduce the noise level; after modulating the at least one of the first version and the second version based on the noise level, encoding data onto at least one of the first version and the second version; and recombining the first version and the second version to transmit the data.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: December 29, 2020
    Assignee: Cisco Technology, Inc.
    Inventors: Sanjay Sunder, Romesh Kumar Nandwana, Craig S. Appel
  • Publication number: 20200373885
    Abstract: Embodiments provide for a tunable driving circuit by monitoring a frequency of a ring oscillator of an electrical integrated circuit connected to an optical modulator to determine operational characteristics of the electrical integrated circuit; setting, based on the operational characteristics, a driving voltage for a plurality of tunable inverters and a plurality of fixed gain inverters that control the optical modulator, wherein each tunable inverter of the plurality of tunable inverters is connected in parallel with a corresponding fixed gain inverter of the plurality of fixed gain inverters on one of a first arm and a second arm connected to the optical modulator; and setting an amplification strength for the plurality of tunable inverters based on the operational characteristics.
    Type: Application
    Filed: May 20, 2019
    Publication date: November 26, 2020
    Inventors: Craig S. APPEL, Peter C. METZ, Joseph V. PAMPANIN, Sanjay SUNDER