Abstract: A multi-protocol communication circuit, for example, a serializer-deserializer (SerDes) circuit for communicating between an internal logic circuit and an external link includes a select terminal configured to accept a select signal representing a plurality of mode select signal. A SerDes core is coupled to the select terminal and configured to transmit outbound data conforming with a first communication protocol in response to a first mode select signal and conforming with a second communication protocol in response to a second mode select signal. The SerDes core is also configured to receive inbound data respective to a first communication protocol in response to a first mode select signal and respective to a second communication protocol in response to a second mode select signal. Advantages of the invention include the ability to provide high bandwidth communications between integrated circuits that employ different SerDes protocols.

Abstract: One embodiment of the present invention provides a system that facilitates scalable high-bandwidth memory access using a memory module with optical interconnect. This system includes an optical channel, a memory buffer, and a random-access memory module. The memory buffer is configured to receive a request from a memory controller via the optical channel. The memory buffer handles the received request by performing operations on the random-access memory module and then sending a response to the memory controller via the optical channel. Hence, the memory module with optical interconnect provides a high-speed serial link to the random-access memory module without consuming a large number of pins per channel on the memory controller.

Abstract: A memory module is formed of multiple memory chips and an optical interface chip fixed on a substrate. The chips are interconnected by proximity communication (PxC) in which each chip includes transmitting and receiving elements, such as electrical pads which form capacitively coupled links when the chips are placed together with their pads facing each other. The PxC links may be directly between the chips or through an intermediate passive bridge chip. The interface chip is coupled to an external optical channel and includes converters between optical and electrical signals, control circuitry, buffers, and PxC elements for communicating with the memory chips. The array of memories may be a linear or two-dimensional array around the interface chip forming a redundant PxC network, optionally with redundant PxC connections. Multiple rectangular memory chips may present their narrow sides to the interface chip to maximize bandwidth.

Abstract: A memory module is formed of multiple memory chips and an optical interface chip fixed on a substrate. The chips are interconnected by proximity communication (PxC) in which each chip includes transmitting and receiving elements, such as electrical pads which form capacitively coupled links when the chips are placed together with their pads facing each other. The PxC links may be directly between the chips or through an intermediate passive bridge chip. The interface chip is coupled to an external optical channel and includes converters between optical and electrical signals, control circuitry, buffers, and PxC elements for communicating with the memory chips. The array of memories may be a linear or two-dimensional array around the interface chip forming a redundant PxC network, optionally with redundant PxC connections. Multiple rectangular memory chips may present their narrow sides to the interface chip to maximize bandwidth.

Abstract: A modem and method for operating same. A receiver circuit of the modem is coupled to receive a continuous analog signal from a communication channel. This analog signal includes both packet and idle information. The receiver circuit monitors the analog signal to detect the presence of idle information. Upon detecting idle information, the receiver circuit enters a standby mode in which the processing requirements of the receiver circuit are reduced. A burst mode protocol is also provided, in which packets of digital information are modulated by a transmitter circuit the modem, thereby converting the packets of digital information into analog signal bursts of discrete duration. These analog signal bursts are transmitted from the transmitter circuit to a telephone line. However, the transmitter circuit does not generate any signals between the analog signal bursts. A receiver circuit monitors the telephone line to detect the analog signal bursts.

Abstract: A receiver circuit of the modem is coupled to receive a continuous analog signal from a communication channel. This analog signal includes both packet and idle information. A burst mode protocol is also provided, in which packets of digital information are modulated by a transmitter circuit of the modem, thereby converting the packets of digital information into analog signal bursts of discrete duration. These analog signal bursts are transmitted from the transmitter circuit to a telephone line. A receiver circuit monitors the telephone line to detect the analog signal bursts. Upon detecting the presence of the analog signal bursts on the telephone line, the receiver circuit demodulates the analog signal bursts using full processing capabilities of the receiver circuit. However, upon detecting the absence of the analog signal bursts on the telephone line, the demodulating function of the receiver circuit is disabled.

Abstract: One embodiment of the present invention provides a system that facilitates scalable high-bandwidth memory access using a memory module with optical interconnect. This system includes an optical channel, a memory buffer, and a random-access memory module. The memory buffer is configured to receive a request from a memory controller via the optical channel. The memory buffer handles the received request by performing operations on the random-access memory module and then sending a response to the memory controller via the optical channel. Hence, the memory module with optical interconnect provides a high-speed serial link to the random-access memory module without consuming a large number of pins per channel on the memory controller.

Abstract: A modem and method for operating same. A receiver circuit of the modem is coupled to receive a continuous analog signal from a communication channel. This analog signal includes both packet and idle information. The receiver circuit monitors the analog signal to detect the presence of idle information. Upon detecting idle information, the receiver circuit enters a standby mode in which the processing requirements of the receiver circuit are reduced. A burst mode protocol is also provided, in which packets of digital information are modulated by a transmitter circuit 6f the modem, thereby converting the packets of digital information into analog signal bursts of discrete duration. These analog signal bursts are transmitted from the transmitter circuit to a telephone line. However, the transmitter circuit does not generate any signals between the analog signal bursts. A receiver circuit monitors the telephone line to detect the analog signal bursts.

Abstract: A modem and method for operating same. A receiver circuit of the modem is coupled to receive a continuous analog signal from a communication channel. This analog signal includes both packet and idle information. The receiver circuit monitors the analog signal to detect the presence of idle information. Upon detecting idle information, the receiver circuit enters a standby mode in which the processing requirements of the receiver circuit are reduced. A burst mode protocol is also provided, in which packets of digital information are modulated by a transmitter circuit of the modem, thereby converting the packets of digital information into analog signal bursts of discrete duration. These analog signal bursts are transmitted from the transmitter circuit to a telephone line. However, the transmitter circuit does not generate any signals between the analog signal bursts. A receiver circuit monitors the telephone line to detect the analog signal bursts.

Abstract: A modem and method for operating same. A receiver circuit of the modem is coupled to receive a continuous analog signal from a communication channel. This analog signal includes both packet and idle information. The receiver circuit monitors the analog signal to detect the presence of idle information. Upon detecting idle information, the receiver circuit enters a standby mode in which the processing requirements of the receiver circuit are reduced. A burst mode protocol is also provided, in which packets of digital information are modulated by a transmitter circuit of the modem, thereby converting the packets of digital information into analog signal bursts of discrete duration. These analog signal bursts are transmitted from the transmitter circuit to a telephone line. However, the transmitter circuit does not generate any signals between the analog signal bursts. A receiver circuit monitors the telephone line to detect the analog signal bursts.

Abstract: A modem and method for operating same. A receiver circuit of the modem is coupled to receive a continuous analog signal from a communication channel. This analog signal includes both packet and idle information. The receiver circuit monitors the analog signal to detect the presence of idle information. Upon detecting idle information, the receiver circuit enters a standby mode in which the processing requirements of the receiver circuit are reduced. A burst mode protocol is also provided, in which packets of digital information are modulated by a transmitter circuit of the modem, thereby converting the packets of digital information into analog signal bursts of discrete duration. These analog signal bursts are transmitted from the transmitter circuit to a telephone line. However, the transmitter circuit does not generate any signals between the analog signal bursts. A receiver circuit monitors the telephone line to detect the analog signal bursts.

Abstract: A method and apparatus for quickly copying a first frame region into a second frame region. A video memory array comprising a plurality of video random access memory devices is divided into at least two frame regions. A background image is rendered by a central processing unit into a background frame region within the video memory array. The central processing unit then requests the background image in the background frame region to be copied into a new frame region in the video memory array. A dedicated circuit copies the entire background image in the background frame region into the new frame region. The dedicated circuit operates by using a serial data register within each video random access memory device during the vertical retrace period of a video timing signal. The dedicated circuit performs the background frame copy without requiring any processing resources from the central processing unit.

Abstract: A touch screen power control function in a computer system, wherein a touch screen input device is employed to control power modes for the computer system. A touch screen controller senses a touch input from the touch screen input device. If the computer system is in a full power mode, the touch screen controller determines the input coordinates corresponding to the touch input, and transfers the input coordinates to a central processing system. If the computer system is in a power down mode, the touch screen controller asserts a main power on signal to a power subsystem, which causes the power subsystem to supply power to the central processing system according to the touch input.

Abstract: A method and apparatus for quickly copying a first frame region into a second frame region. A video memory array comprising a plurality of video random access memory devices is divided into at least two frame regions. A background image is rendered by a central processing unit into a background frame region within the video memory array. The central processing unit then requests the background image in the background frame region to be copied into a new frame region in the video memory array. A dedicated circuit copies the entire background image in the background frame region into the new frame region. The dedicated circuit operates by using a serial data register within each video random access memory device during the vertical retrace period of a video timing signal. The dedicated circuit performs the background frame copy without requiring any processing resources from the central processing unit.