Patents by Inventor Craig S. Mitchell

Craig S. Mitchell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6329224
    Abstract: Microelectronic assemblies are encapsulated using disposable frames. The microelectronic assemblies are disposed within an aperture defined by a frame. The aperture is covered by top and bottom sealing layers so that the frame and sealing layers define an enclosed space encompassing the assemblies. The encapsulant is injected into this closed space. The frame is then separated from the encapsulation fixture and held in a curing oven. After cure, the frame is cut apart and the individual assemblies are severed from one another. Because the frame need not be held in the encapsulation fixture during curing, the process achieves a high throughput.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: December 11, 2001
    Assignee: Tessera, Inc.
    Inventors: Tan Nguyen, Craig S. Mitchell, Thomas H. Distefano
  • Publication number: 20010023995
    Abstract: Microelectronic assemblies are encapsulated using disposable frames. The microelectronic assemblies are disposed within an aperture defined by a frame. The aperture is covered by top and bottom sealing layers so that the frame and sealing layers define an enclosed space encompassing the assemblies. The encapsulant is injected into this closed space. The frame is then separated from the encapsulation fixture and held in a curing oven. After cure, the frame is cut apart and the individual assemblies are severed from one another. Because the frame need not be held in the encapsulation fixture during curing, the process achieves a high throughput.
    Type: Application
    Filed: June 6, 2001
    Publication date: September 27, 2001
    Inventors: Tan Nguyen, Craig S. Mitchell, Thomas H. Distefano
  • Patent number: 6218215
    Abstract: A method of making a semiconductor chip package by attaching a chip to a dielectric layer; placing the dielectric layer and chip into a mold; disposing a thixotropic composition that has bee sheared to reduced its viscosity into the mold and curing the thixotropic composition after the chip and dielectric layer have been removed from the mold. A method of making a semiconductor chip package without using a mold by disposing a sheared thixotropic composition between a semiconductor chip and a dielectric layer and then curing the thixotropic composition to form a cured encapsulant.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: April 17, 2001
    Assignee: Tessera, Inc.
    Inventors: Thomas H. Distefano, Craig S. Mitchell
  • Patent number: 6197665
    Abstract: A lamination machine includes means for using gas pressure to bring a coverlay and a microelectronic package into intimate contact and means for heating a coverlay adhesive in order to seal the coverlay to the package. A method of laminating a coverlay to a microelectronic package using the lamination machine includes using gas pressure to bring a coverlay into intimate contact with a microelectronic package. The method also includes heating an adhesive on the coverlay in order to adhere the coverlay to the package. Once the coverlay is laminated to the package, the package can be encapsulated with a curable encapsulant composition. The method may also include decreasing the pressure in the chamber disposed above the package to reduce voids and bubble and/or regulating the pressure in a bladder disposed in a chamber below the package.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: March 6, 2001
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, Craig S. Mitchell, Tan Nguyen
  • Patent number: 6126428
    Abstract: A microelectronic assembly such as an assembly of a semiconductor chip and mounting substrate is encapsulated by applying an encapsulant to the assembly while maintaining the assembly under a subatmospheric pressure to minimize gas entrapment in the encapsulant. After the encapsulant flow around the assembly, a higher pressure is applied, causing collapse of any voids in the encapsulant. The encapsulant is then cured. The apparatus used for such encapsulation may include a chamber and a dispenser having a nozzle disposed within the chamber, and may also include a device for moving the nozzle or the assembly relative to the chamber.
    Type: Grant
    Filed: January 8, 1999
    Date of Patent: October 3, 2000
    Assignee: Tessera, Inc.
    Inventors: Craig S. Mitchell, Thomas H. Distefano
  • Patent number: 6080605
    Abstract: A method of making a semiconductor chip package by attaching a chip to a dielectric layer; placing the dielectric layer and chip into a mold; disposing a thixotropic composition that has bee sheared to reduced its viscosity into the mold and curing the thixotropic composition after the chip and dielectric layer have been removed from the mold. A method of making a semiconductor chip package without using a mold by disposing a sheared thixotropic composition between a semiconductor chip and a dielectric layer and then curing the thixotropic composition to form a cured encapsulant.
    Type: Grant
    Filed: October 6, 1998
    Date of Patent: June 27, 2000
    Assignee: Tessera, Inc.
    Inventors: Thomas H. Distefano, Craig S. Mitchell
  • Patent number: 6046076
    Abstract: A microelectronic assembly such as an assembly of a semiconductor chip and mounting substrate is encapsulated by applying an encapsulant to the assembly while maintaining the assembly under a subatmospheric pressure to minimize gas entrapment in the encapsulant. After the encapsulant flow around the assembly, a higher pressure is applied, causing collapse of any voids in the encapsulant. The encapsulant is then cured. The method is particularly useful with assemblies wherein a chip is spaced from the substrate so that the encapsulant flows between the chip and substrate.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: April 4, 2000
    Assignee: Tessera, Inc.
    Inventors: Craig S. Mitchell, Thomas H. Distefano
  • Patent number: 5776796
    Abstract: A method of encapsulating a semiconductor device. The encapsulation method includes a semiconductor chip package assembly having a spacer layer between a top surface of a sheet-like substrate and a contact bearing surface of a semiconductor chip, wherein the substrate has conductive leads thereon, the leads being electrically connected to terminals on a first end and bonded to respective chip contacts on a second end. Typically, the spacer layer is comprised of a compliant or elastomeric material. A protective layer is attached on a bottom surface of the substrate so as to cover the terminals on the substrate. A flowable, curable encapsulant material is deposited around a periphery of the semiconductor chip after the attachment of the protective layer so as to encapsulate the leads. The encapsulant material is then cured. Typically, this encapsulation method is performed on a plurality of chip assemblies simultaneously.
    Type: Grant
    Filed: October 7, 1996
    Date of Patent: July 7, 1998
    Assignee: Tessera, Inc.
    Inventors: Thomas H. Distefano, John W. Smith, Joseph Fjelstad, Craig S. Mitchell, Konstantine Karavakis